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Volumn , Issue , 1986, Pages 385-387
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CMOS CIRCUIT DESIGN FOR PREVENTION OF SINGLE EVENT UPSET.
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Author keywords
[No Author keywords available]
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Indexed keywords
LOGIC CIRCUITS, COMBINATORIAL;
CMOS VLSI;
COMBINATIONAL LOGIC;
SINGLE EVENT UPSET (SEU);
INTEGRATED CIRCUITS;
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EID: 0022876515
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (25)
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References (9)
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