Analysis of the Gate-Voltage-Dependent Series Resistance of MOSFET's

IEEE Transactions on Electron Devices

Volumn 33, Issue 7, 1986, Pages 965-972

  Ng, Kwok K ^a   Lynch, William T ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONDUCTIVITY - MATHEMATICAL MODELS; SEMICONDUCTOR DEVICES - JUNCTIONS; SEMICONDUCTOR MATERIALS - DOPING;

DOPING PROFILE STEEPNESS; GATE-VOLTAGE-DEPENDENT SERIES RESISTANCE; INTRINSIC PARASITIC SERIES RESISTANCE; STEEP JUNCTION PROFILE;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0022751618     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1986.22602     Document Type: Article

References (16)

1. G. Baccarani and G. A. Sai-Halasz, “Spreading resistance in submicron MOSFET's,” IEEE Electron Device Lett., vol. EDL-4, no. 2, p. 27, 1983.
2. M. H. Seavey, “Source and drain resistance determination for MOSFET's,” IEEE Electron Device Lett., vol. EDL-5, no. 11, p. 479, 1984.
3. K. K. Ng, R. J. Bayruns, and S. C. Fang, “The spreading resistance of MOSFET's,” IEEE Electron Device Lett., vol. EDL-6, no. 4, p. 195, 1985.
4. F. Stern, “Quantum properties of surface space-charge layers,” Crit. Rev. Solid State Sci., vol. 4, p. 499, 1974.
5. S. A. Schwarz and S. E. Russek, “Semi-empirical equations for electron velocity in silicon: Part II-MOS inversion layer,” IEEE Trans. Electron Devices, vol. ED-30, no. 12, p. 1634, 1983.
6. J. A. Pals, “Quantization effects in semiconductor inversion and accumulation layers,” Philips Res. Rep. Suppl., vol. 7, p. 1, 1972.
7. H. Murrmann and D. Widmann, “Current crowding on metal contacts to planar devices,” IEEE Trans. EIectron Devices, vol. ED-16, no. 12, p. 1022, 1969.
8. J. M. Pimbley, to be published.
9. W. E. Beadle, J. C. C. Tsai, and R. D. Plummer, Eds., Quick Reference Manual for Silicon Integrated Circuit Technology. New York: Wiley, 1985.
10. E. Jahnke and F. Emde, Tables of Functions. New York: Dover, 1945.
11. I. S. Gradshteyn and I. M. Ryzhik, Table of Integrals, Series, and Products. New York: Academic, 1980.
12. A. G. Sabnis and J. T. Clemens, “Characterization of the electron mobility in the inverted (100) Si surface,” in IEDM Tech. Dig, p. 18, 1979.
13. S. C. Sun and J. D. Plummer, “Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces,” IEEE Trans. Electron Devices, vol. ED-27, no. 8, p. 1497, 1980.
14. B. R. Penumalli, “A comprehensive two-dimensional VLSI process simulation program, BICEPS,” IEEE Trans. Electron Devices, vol. ED-30, no. 9, p. 986, 1983.
15. A. Eltoukhy, B. Bastani, and Y. El-Mansy, “Evaluation of injection resistance on submicron PMOS performance,” presented at the IEEE Device Research Conf., Boulder, CO, 1985.
16. P. Antognetti, C. Lombardi, and D. Antoniadis, “Use of process and 2-D MOS simulation in the study of doping profile influence on SID resistance in short channel MOSFET's,” in IEDM Tech. Dig., p. 574, 1981.