FUNCTIONAL TEST GENERATION FOR DIGITAL CIRCUITS DESCRIBED USING BINARY DECISION DIAGRAMS.

IEEE Transactions on Computers

Volumn C-35, Issue 4, 1986, Pages 375-379

  Abadir, Magdy S ^a   Reghbati, Hassan K ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING - ALGORITHMS; DECISION THEORY AND ANALYSIS; INTEGRATED CIRCUIT TESTING; INTEGRATED CIRCUITS, VLSI - TESTING;

BINARY DECISION DIAGRAMS; FUNCTIONAL TEST GENERATION; GENERALIZED D ALGORITHMS;

LOGIC CIRCUITS;

EID: 0022700959     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1986.1676774     Document Type: Article

References (19)

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