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Volumn 33, Issue 3, 1986, Pages 379-384

Ultrahigh-Speed Logic Gate Family with Nb/Al-AlOx/Nb Josephson Junctions

Author keywords

[No Author keywords available]

Indexed keywords

SUPERCONDUCTING DEVICES - JOSEPHSON JUNCTIONS;

EID: 0022683237     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1986.22498     Document Type: Article
Times cited : (19)

References (15)
  • 1
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    • T. R. Gheewala, “Design of 2.5- μ m micrometer Josephson current injection logic (CIL),” IBM J. Res. Develop., vol. 24, no. 2, pp. 130–142, 1980.
    • (1980) IBM J. Res. Develop. , vol.24 , Issue.2 , pp. 130-142
    • Gheewala, T.R.1
  • 2
    • 36749116588 scopus 로고
    • Logic delay of 5-μ m current-switched Josephson gates
    • S. S. Pei, “Logic delay of 5-μ m current-switched Josephson gates,” Appl. Phys. Lett., vol. 40, no. 8, p. 739, 1982.
    • (1982) Appl. Phys. Lett. , vol.40 , Issue.8 , pp. 739
    • Pei, S.S.1
  • 3
    • 36749114644 scopus 로고
    • Logic delay of 5-μ m resistor-coupled Josephson logic
    • J. Sone, T. Yoshida, S. Tahara, and H. Abe, “Logic delay of 5-μ m resistor-coupled Josephson logic,” Appl. Phys. Lett., vol. 41, no. 9, p. 886, 1982.
    • (1982) Appl. Phys. Lett. , vol.41 , Issue.9 , pp. 886
    • Sone, J.1    Yoshida, T.2    Tahara, S.3    Abe, H.4
  • 4
    • 0020750242 scopus 로고
    • Sub-10 ps logic operation in Josephson four-junction logic (4JL) gates
    • H. Nakagawa, T. Odake, E. Sogawa, S. Tanaka, and H. Hayakawa, “Sub-10 ps logic operation in Josephson four-junction logic (4JL) gates,” Japan. J. Appl. Phys., vol. 22, no. 5, p. L297, 1983.
    • (1983) Japan. J. Appl. Phys. , vol.22 , Issue.5 , pp. 1297
    • Nakagawa, H.1    Odake, T.2    Sogawa, E.3    Tanaka, S.4    Hayakawa, H.5
  • 5
    • 0021446968 scopus 로고
    • Ultrahigh speed direct coupled logic gate fabricated with NbN/Pb Josephson junctions
    • Y. Tarutani, and U. Kawabe, “Ultrahigh speed direct coupled logic gate fabricated with NbN/Pb Josephson junctions,” Appl. Phys. Lett., vol. 44, no. 11, p. 1095, 1984.
    • (1984) Appl. Phys. Lett. , vol.44 , Issue.11 , pp. 1095
    • Hatano, Y.1    Nishino, T.2    Tarutani, Y.3    Kawabe, U.4
  • 7
    • 0021786356 scopus 로고
    • 9 ps gate delay Josephson or gate with modified variable threshold logic
    • N. Fujimaki, S. Kotani, S. Hasuo, and T. Yamaoka, “9 ps gate delay Josephson or gate with modified variable threshold logic,” Japan. J. Appl. Phys., vol. 24, no. 1, p. L1, 1985.
    • (1985) Japan. J. Appl. Phys. , vol.24 , Issue.1 , pp. L1
    • Fujimaki, N.1    Kotani, S.2    Hasuo, S.3    Yamaoka, T.4
  • 8
    • 0022082299 scopus 로고
    • 5.6 ps gate delay all refractory Josephson OR gate with modified variable threshold logic
    • S. Kotani, N. Fujimaki, T. Imamura, S. Hasuo, and T. Yamaoka,” 5.6 ps gate delay all refractory Josephson OR gate with modified variable threshold logic” Japan. J. Appl. Phys., vol. 24, no. 6, p. L421, 1985.
    • (1985) Japan. J. Appl. Phys. , vol.24 , Issue.6 , pp. 1421
    • Kotani, S.1    Fujimaki, N.2    Imamura, T.3    Hasuo, S.4    Yamaoka, T.5
  • 9
    • 36749108668 scopus 로고
    • High quality refractory Josephson tunnel junctions utilizing thin aluminum layers
    • M. Gurvitch, M. A. Washington, and H. A. Huggens, “High quality refractory Josephson tunnel junctions utilizing thin aluminum layers,” Appl. Phys. Lett., vol. 42, no. 5, 472, 1983.
    • (1983) Appl. Phys. Lett. , vol.42 , Issue.472
    • Gurvitch, M.1    Washington, M.A.2    Huggens, H.A.3
  • 10
    • 0021698080 scopus 로고
    • All niobium nitride Josephson junction with hydrogenated amorphous silicon barrier and its application to logic circuit
    • M. Aoyagi, A. Shoji, S. Kosaka, F. Shinoki, H. Nakagawa, S. Takada, and H. Hayakawa, “All niobium nitride Josephson junction with hydrogenated amorphous silicon barrier and its application to logic circuit,” Japan. J. Appl. Phys., vol. 23, no. 12, p. L916, 1984.
    • (1984) Japan. J. Appl. Phys. , vol.23 , Issue.12 , pp. L916
    • Aoyagi, M.1    Shoji, A.2    Kosaka, S.3    Shinoki, F.4    Nakagawa, H.5    Takada, S.6    Hayakawa, H.7
  • 13
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    • x films for Josephson integrated circuits
    • H. Shibayama, S. Hasuo, and T. Yamaoka, “Formation of low defect density SiO x films for Josephson integrated circuits,” Appl. Phys. vol.
    • Appl. Phys.
    • Shibayama, H.1    Hasuo, S.2    Yamaoka, T.3
  • 14
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    • Generation and measurement of ultrashort current pulses with Josephson devices
    • S. M. Faris, “Generation and measurement of ultrashort current pulses with Josephson devices,” Appl. Phys. Lett., vol. 36, no. 12, p. 1005, 1980.
    • (1980) Appl. Phys. Lett. , vol.36 , Issue.12 , pp. 1005
    • Faris, S.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.