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Volumn , Issue , 1986, Pages 410-415
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GENERAL SCHEME TO OPTIMIZE ERROR MASKING IN BUILT-IN SELF-TESTING.
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER SYSTEMS, DIGITAL - FAULT TOLERANT CAPABILITY;
COMPUTERS, DIGITAL - SHIFT REGISTERS;
BUILT-IN SELF-TESTING;
DATA COMPRESSION;
ERROR MASKING;
LINEAR FEEDBACK SHIFT REGISTER;
LOGIC CIRCUITS, COMBINATORIAL;
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EID: 0022604578
PISSN: 07313071
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (27)
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References (23)
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