DESIGN OF QUATERNARY SWITCHING CIRCUITS USING INDIVIDUAL MOS PASS-TRANSISTORS AND CAPACITOR MEMORY.

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 1986, Pages 26-32

  Watanabe, Tatsuki ^a   Matsumoto, Masayuki ^a   Nagaru, Shigenori ^a  

^a TOYO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS - STORAGE; LOGIC CIRCUITS - COMPUTER SIMULATION; SEMICONDUCTOR DEVICES, MOS; TRANSISTORS;

CAPACITOR MEMORIES; MOS PASS-TRANSISTORS; QUATERNARY SWITCHING CIRCUITS; SYNCHRONOUS SEQUENTIAL CIRCUITS;

ELECTRONIC CIRCUITS, SWITCHING;

EID: 0022563538     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)