HARDWARE ACCELERATION OF LOGIC SIMULATION USING A DATA FLOW ARCHITECTURE.

Volumn , Issue , 1985, Pages 130-132

  Catlin, Gary ^a   Paseman, Bill ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE;

DATA FLOW COMPUTING; HARDWARE ACCELERATORS; LOGIC SIMULATORS; WORKSTATIONS;

LOGIC DESIGN;

EID: 0022242090     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)