VLSI ARRAYS FOR DIGITAL SIGNAL PROCESSING: I - A MODEL IDENTIFICATION APPROACH TO DIGITAL FILTER REALIZATIONS.

IEEE transactions on circuits and systems

Volumn CAS-32, Issue 11, 1985, Pages 1105-1118

  Rao, Sailesh K ^a   Kailath, Thomas ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FILTERS, DIGITAL - DESIGN; MATHEMATICAL TECHNIQUES - ALGORITHMS; SIGNAL PROCESSING - DIGITAL TECHNIQUES;

DUAL ARRAYS; DUALITY THEOREM; SINGLE-INPUT, SINGLE-OUTPUT LINEAR TIME-INVARIANT FILTERS; VLSI ARRAYS;

INTEGRATED CIRCUITS, VLSI;

EID: 0022152948     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/tcs.1985.1085645     Document Type: Article

References (31)