A Knowledge-Based System for Designing Testable VLSI Chips

IEEE Design and Test of Computers

Volumn 2, Issue 4, 1985, Pages 56-68

  Abadir, Magdy S ^a   Breuer, Melvin A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN FOR TESTABILITY (DFT); KNOWLEDGE BASED SYSTEMS; TESTABLE DESIGN METHODOLOGY (TDM);

ARTIFICIAL INTELLIGENCE - EXPERT SYSTEMS; INTEGRATED CIRCUIT TESTING;

INTEGRATED CIRCUITS, VLSI;

EID: 0022106277     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.1985.294746     Document Type: Article

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