SYNCHRONIZING LARGE VLSI PROCESSOR ARRAYS.

IEEE Transactions on Computers

Volumn C-34, Issue 8, 1985, Pages 734-740

  Fisher, Allan L ^a   Kung, H T ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTERS, MICROCOMPUTER;

DATA TRANSFER SYNCHRONIZATION; LOWER BOUNDS ON CLOCK SKEW; PARALLEL VLSI COMPUTING STRUCTURES; PIPELINED CLOCKING SCHEME;

COMPUTER SYSTEMS, DIGITAL;

EID: 0022102734     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1985.1676619     Document Type: Article

References (11)

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10. C. L. Seitz Introduction to VLSI Systems 1980 Addison Wesley MA, Reading System timing
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