Low-Noise Operation in Buried-Channel MOSFFT’s

IEEE Electron Device Letters

Volumn 6, Issue 7, 1985, Pages 317-319

  Watanabe, T ^a  

^a SHARP CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC MEASUREMENTS; SEMICONDUCTOR DEVICES, MOS;

BURIED-CHANNEL MOSFET; MOS ANALOG CIRCUITS; NOISE PERFORMANCE; NOISE SOURCES;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0022099572     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/EDL.1985.26140     Document Type: Article

References (6)

1. R. W. Brodersen and S. P. Emmons, “Noise in buried channel charge-coupled devices,” IEEE J. Solid-State Circuits, vol. SC-11, pp. 147–-155 Feb., 1976.
2. P. R. Gray, “Basic MOS operational amplifier design—An over view,” in Analog MOS Integrated Circuits. New York: IEEE Press, 1980, pp. 28–49.
3. K. C. Gunsager, C. K. Kim, and J. D. Phillips, “Performance and operation of buried channel charge coupled devices,” in IEDM Tech Dig., Dec. 1973, pp. 21–23.
4. R. P. Troutman, “Low-level avalanche multiplication in IGFET’s,” in IEDM Tech. Dig., Dec. 1974, pp. 43–46.
5. T. Kamata, K. Tanabashi, and K. Kobayashi, “Substrate current due to impact ionization in MOSFET,” Japan, J. Appl. Phys., vol. 15, pp. 1127–1133, June 1976.
6. J. Hynecek, “Design and performance of a low-noise charge-detection amplifier for VPCCD devices,” IEEE Trans. Electron Devices, vol. ED-31, pp. 1713–1719, Dec. 1984.