A Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy

IEEE Journal of Solid-State Circuits

Volumn 20, Issue 1, 1985, Pages 123-129

  Taur, Yuan ^a   Hu, Genda J ^a   Dennard, Robert H ^a   Terman, Lewis M ^a   Ting, Chung Yu ^a   Petrillo, Karen E ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT MANUFACTURE;

CMOS PROCESS; EPITAXIAL LAYERS; RETROGRADE N-WELLS; SHEET RESISTANCE; THIN EPITAXY;

SEMICONDUCTOR DEVICES, MOS;

EID: 0022010018     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1985.1052284     Document Type: Article

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