Technology Independent Device Modeling for Simulation of Integrated Circuits for FET Technologies

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 4, Issue 1, 1985, Pages 99-110

  Bischoff, Gabriel ^a   Krusius, J Peter ^a  

^a Cornell University School of Electrical Engineering ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN;

CAD; CIRCUIT SIMULATION; DEVICE MODEL GENERATION; DEVICE MODELING; SPLINE REPRESENTATION;

INTEGRATED CIRCUITS;

EID: 0021785035     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/TCAD.1985.1270102     Document Type: Article

References (13)

1. [1] A preliminary presentation of the approach described in this paper was given by these authors at the 5th Annu. Conference on Electron Devices activities in Western New York, October 1982, Rochester, New York, unpublished.
2. [2] C. de Boor, A practical guide to splines, Applied Mathematical Series No. 27, Springer Verlag, 1978.
3. [3] See e.g. H. Iwai and S. Kohyama, Capacitance Measurement Technique in High Density MOS Structures in Proceedings of the International Electron Devices Meeting, pp. 235-238, 1980.
4. [4] NCR Corporation, Microelectronics, Fort Collins, Colorado.
5. [5] SPICE is a well known circuit simulator from University of California, Berkeley, California. See e.g. A. Vladimirescu, A. R. Newton, and D. O. Pederson, SPICE Version 2G.0, Department of Electrical Engineering and Computer Sciences, University of California Berkeley.
6. [6] T. Shima, T. Sugawara, S. Moriyama, and H. Yamada, “Three- Dimensional Table Look-up Model for Precise Circuit Simulation,” IEEE J. Solid State Circuits, pp. 449–454, June 82.
7. [7] Peter P. Reusens, Richard W. Linderman and Walter H. Ku, “CUSP: A Custom VLSI Processor for Digital Signal Processing Based on the Fast Fourier Transform,” Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers, Port Chester, New York, October 31-November 3 1983, IEEE, New York 1983 pp. 757–160.
8. [8] A. Vladimirescu, A. R. Newton, D. O. Pederson, DEECS UC Berkeley SPICE Version 2G.0 User's Guide (14 July 1980).
9. [9] Interdesign Inc., Sunnyvale, California, CMOS Monochip and CMOS Design Manual, rev. 8/80.
10. [10] A Hewlett Packard automatic parameter analyzer HP 4145 was used for these measurements.
11. [11] General Electric Company, Electronics Laboratory, Syracuse, New York, CMOS/SOS test element group.
12. [12] J. Nulman, J. Faricelli and J. P. Krusius, 1/2 μm Silicon MESFET Logic Devices, IEEE Transactions on Electron Devices ED-29, 1665 (1982). Also J. Nulman, J. Faricelli, J. P. Krusius, and J. Frey, ibid ED-30,1395 (1983).
13. [13] Spice is distributed, e.g., through ARPANET.