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Circuits, Systems, and Signal Processing
Volumn 3, Issue 3, 1984, Pages 267-294
High-speed recursive digital filter realization
Author keywords

[No Author keywords available]
Indexed keywords

ELECTRIC NETWORKS - SYNTHESIS; LOGIC DESIGN; MATHEMATICAL TECHNIQUES - DIGITAL ARITHMETIC;
EID: 0021624005     PISSN: 0278081X     EISSN: 15315878     Source Type: Journal    
DOI: 10.1007/BF01599077     Document Type: Article
Times cited : (49)
References (8)
  • 2
    • 84931885518 scopus 로고    scopus 로고
    • Chen, T. C., Overlap and Pipeline Processing, Introduction to Computer Architecture, H. Stone, editor, Science Research Associate, Chicago, Chapter 9.
  • 3
    • 84931885517 scopus 로고    scopus 로고
    • Cray Research, Inc., Cray-1 Hardware Reference Manual, Cray Research Publication No. 2240004, Rev. E, 1979.
  • 4
    • 84931885516 scopus 로고    scopus 로고
    • Soderstrand, M. A. and Fields, E. L., A High Speed Low-Cost Recursive Digital Filter Using Residue Number Arithmetic, Proc. IEEE (1977).
  • 5
    • 84931885515 scopus 로고
    • Pipelined Finite State Machine Architecture Applied to Digital Filters
    • University of California, Davis, CA
    • (1983) Ph.D. Dissertation
    • Sinha, B.1
  • 7
    • 84931885514 scopus 로고    scopus 로고
    • Voelcker, H. B. and Hartquest, E. E., Digital Filtering Via Block Recursion, IEEE Transactions on Audio and Electroacoustics (1970).

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.