-
1
-
-
0017981717
-
Wafer-scale integration-A fault tolerant procedure.
-
(June)
-
Aubusson, R., and Catt, I. Wafer-scale integration-A fault tolerant procedure. IEEE J Solid-State Circuits SC-13, 3 (June 1978), pp. 339-344.
-
(1978)
IEEE J Solid-State Circuits
, vol.SC-13
, Issue.3
, pp. 339-344
-
-
Aubusson, R.1
Catt, I.2
-
2
-
-
84915211389
-
A critique and appraisal of VLSI models of computation.
-
H.T. Kung, B. Sproull, and G. Steele, Eds. Computer Science Press, Rockville, Md.
-
Bilardi, G., Pracchi, M., and Preparata, F. A critique and appraisal of VLSI models of computation. In VLSI Systems and Computation, H.T. Kung, B. Sproull, and G. Steele, Eds. Computer Science Press, Rockville, Md., 1981, pp. 81-88.
-
(1981)
In VLSI Systems and Computation
, pp. 81-88
-
-
Bilardi, G.1
Pracchi, M.2
Preparata, F.3
-
6
-
-
0008657127
-
-
Phys. Rev. (May 1)
-
Frisch, H., Hammersley, J.M., and Welsh, D. Monte Carlo estimates of percolation probabilities for various lattices. Phys. Rev. 126, 3 (May 1, 1962), 949-951.
-
(1962)
Monte Carlo estimates of percolation probabilities for various lattices.
, vol.126
, Issue.3
, pp. 949-951
-
-
Frisch, H.1
Hammersley, J.M.2
Welsh, D.3
-
7
-
-
84947663293
-
Fault tolerant wafer-scale architectures for VLSI.
-
(Austin, Tex., Apr. 26-29). IEEE, New York
-
Fussell, D., and Varman, P. Fault tolerant wafer-scale architectures for VLSI. In Proceedings of the 9th Annual Symposium on Computer Architecture (Austin, Tex., Apr. 26-29). IEEE, New York, 1982, pp. 190-198.
-
(1982)
In Proceedings of the 9th Annual Symposium on Computer Architecture
, pp. 190-198
-
-
Fussell, D.1
Varman, P.2
-
9
-
-
84915151455
-
-
Ph.D. dissertation, Dept, of Electrical Engineering, Stanford Univ., Stanford, Calif.
-
Greene, J. W. Configuration of VLSI arrays in the presence of defects. Ph.D. dissertation, Dept, of Electrical Engineering, Stanford Univ., Stanford, Calif., 1983.
-
(1983)
Configuration of VLSI arrays in the presence of defects.
-
-
Greene, J.W.1
-
10
-
-
84976799954
-
Configuration of VLSI arrays in the presence of defects-Part II
-
(See also [9]).
-
Greene, J.W., and El Gamal, A. Configuration of VLSI arrays in the presence of defects-Part II. Submitted for publication. (See also [9]).
-
Submitted for publication
-
-
Greene, J.W.1
El Gamal, A.2
-
11
-
-
3042582096
-
Bomes supérieures de la probabilité critique dans un processus de filtration.
-
Centre National de la Recherche Scientifique, Paris, France
-
Hammersley, J.M. Bomes supérieures de la probabilité critique dans un processus de filtration. In Le Calcul des Probability el ses Applications. Centre National de la Recherche Scientifique, Paris, France, 1959, pp. 17-37.
-
(1959)
In Le Calcul des Probability el ses Applications.
, pp. 17-37
-
-
Hammersley, J.M.1
-
12
-
-
0002446794
-
A lower bound for the critical probability in a certain percolation process.
-
Harris, T. A lower bound for the critical probability in a certain percolation process. Proc. Cambridge Phil Soc. 56(1960), 13-20.
-
(1960)
Proc. Cambridge Phil Soc.
, vol.56
, pp. 13-20
-
-
Harris, T.1
-
13
-
-
84910592133
-
Wafer scale integration of configurable, highly parallel (CHiP), processors (extended abstract).
-
(Bellaire, Mich., Aug. 24-27). IEEE, New York
-
Hedlund, K., and Snyder, L. Wafer scale integration of configurable, highly parallel (CHiP), processors (extended abstract). In Proceedings of the International Conference on Parallel Processing (Bellaire, Mich., Aug. 24-27). IEEE, New York, 1982, pp. 262-264.
-
(1982)
In Proceedings of the International Conference on Parallel Processing
, pp. 262-264
-
-
Hedlund, K.1
Snyder, L.2
-
14
-
-
0019286377
-
Adaptive wafer scale integration
-
Supp. 19-1
-
Hsia, Y., Chang, G., and Erwin, F. Adaptive wafer scale integration. Jpn. J. App. Phys. 19, Supp. 19-1 (1980), 193-202.
-
(1980)
Jpn. J. App. Phys.
, vol.19
, pp. 193-202
-
-
Hsia, Y.1
Chang, G.2
Erwin, F.3
-
15
-
-
0019892884
-
A reconfigurable and fault tolerant VLSI multiprocessor array.
-
(Minneapolis, Minn., May 12-14). IEEE, New York
-
Koren, I. A reconfigurable and fault tolerant VLSI multiprocessor array. In Proceedings of the 8th Annual Symposium on Computer Architecture (Minneapolis, Minn., May 12-14). IEEE, New York, 1981, pp. 425-442.
-
(1981)
In Proceedings of the 8th Annual Symposium on Computer Architecture
, pp. 425-442
-
-
Koren, I.1
-
16
-
-
0020304004
-
Wafer scale integration of systolic arrays (extended abstract).
-
(Chicago, 111., Nov. 3-5). IEEE, New York
-
Leighton, F.T., and Leiserson, C.E. Wafer scale integration of systolic arrays (extended abstract). In Proceedings of the 23rd Annual Symposium on Foundations of Computer Science (Chicago, 111., Nov. 3-5). IEEE, New York, 1982, pp. 297-311.
-
(1982)
In Proceedings of the 23rd Annual Symposium on Foundations of Computer Science
, pp. 297-311
-
-
Leighton, F.T.1
Leiserson, C.E.2
-
18
-
-
0020502599
-
Analysis of low-level computer vision algorithms for implementation on a VLSI processor array.
-
(San Diego, Calif., August 24-27).
-
Lowry, M., and Miller, A. Analysis of low-level computer vision algorithms for implementation on a VLSI processor array. In Proceedings of the SPIE International Society of Optical Engineers (Robotics and Industrial Inspection Conference) (San Diego, Calif., August 24-27). Vol. 360,1982, pp. 143-150.
-
(1982)
In Proceedings of the SPIE International Society of Optical Engineers (Robotics and Industrial Inspection Conference)
, vol.360
, pp. 143-150
-
-
Lowry, M.1
Miller, A.2
-
19
-
-
0020151818
-
Fault tolerant design for VLSI: Effect of interconnect requirements on yield improvement of VLSI designs.
-
(July)
-
Mangir, T., and Avizienis, A. Fault tolerant design for VLSI: Effect of interconnect requirements on yield improvement of VLSI designs. IEEE Trans Comput C-31, 7 (July 1982), 609-616.
-
(1982)
IEEE Trans Comput
, vol.C-31
, Issue.7
, pp. 609-616
-
-
Mangir, T.1
Avizienis, A.2
-
20
-
-
0012604088
-
An approach to highly integrated computer-maintained cellular arrays.
-
(June)
-
Manning, F. An approach to highly integrated computer-maintained cellular arrays. IEEE Trans. Comput., 6 (June 1977), 536-552.
-
(1977)
IEEE Trans. Comput
, Issue.6
, pp. 536-552
-
-
Manning, F.1
-
21
-
-
84976738641
-
-
IEEE, New York
-
Minato, O., Masuhara, T., Sasaki, T., Sakai, Y., and Yoshizaki, K, HI-CMOS II4K. static RAM. Digest of Technical Papers, IEEE Solid State Circuits Conference. IEEE, New York, 1981, pp. 14-15.
-
(1981)
Digest of Technical Papers, IEEE Solid State Circuits Conference
, pp. 14-15
-
-
Minato, O.1
Masuhara, T.2
Sasaki, T.3
Sakai, Y.4
Yoshizaki, K.5
-
22
-
-
84976701375
-
-
2nd ed. Holt, Rinehart & Winston, New York, 190.
-
Pen nisi, L. Elements of Complex Variables, 2nd ed. Holt, Rinehart & Winston, New York, 1976, pp. 177-178, 190.
-
(1976)
Elements of Complex Variables
, pp. 177-178
-
-
Pen nisi, L.1
-
23
-
-
84915615955
-
On the use of nonvolatile programmable links for restructurable VLSI.
-
(Pasadena, Calif., Jan. 22-24). Caltech, Pasadena, Calif
-
Raffel, J. On the use of nonvolatile programmable links for restructurable VLSI. In Proceedings of the Caltech Conference on Very Large Scale Integration (Pasadena, Calif., Jan. 22-24). Caltech, Pasadena, Calif,, 1979, pp. 95-104.
-
(1979)
In Proceedings of the Caltech Conference on Very Large Scale Integration
, pp. 95-104
-
-
Raffel, J.1
-
24
-
-
84976831915
-
The Diogenes approach to testable fault-tolerant networks of processors.
-
Computer Science Dept., Duke Univ., Durham, N.C., May
-
Rosenberg, A. The Diogenes approach to testable fault-tolerant networks of processors. Rep. CS-1982-6.1, Computer Science Dept., Duke Univ., Durham, N.C., May 1982.
-
(1982)
Rep. CS-1982-6.1
-
-
Rosenberg, A.1
-
25
-
-
0019624943
-
Laser programmable redundancy and yield improvement in a 64K DRAM.
-
(Oct.)
-
Smith, R.T., Chlipala, J., Bindels, J., Nelson, R., Fischer, F., and Mantz, T. Laser programmable redundancy and yield improvement in a 64K DRAM. IEEE J. Sohd-State Circuits SC-16, 5 (Oct. 1981),506-513.
-
(1981)
IEEE J. Sohd-State Circuits
, vol.SC-16
, Issue.5
, pp. 506-513
-
-
Smith, R.T.1
Chlipala, J.2
Bindels, J.3
Nelson, R.4
Fischer, F.5
Mantz, T.6
-
26
-
-
84950442767
-
-
Carnegie-Mellon Univ., Pittsburgh, Pa.
-
Thompson, C.D. A complexity theory for VLSI Ph.D. dissertation, Dept, of Computer Science, Carnegie-Mellon Univ., Pittsburgh, Pa., 1980, pp. 41-44.
-
(1980)
A complexity theory for VLSI Ph.D. dissertation, Dept, of Computer Science
, pp. 41-44
-
-
Thompson, C.D.1
-
27
-
-
0039858024
-
-
SIAM J. Appl. Math.
-
Wang, D-L., and Wang, P. Extremal configurations on a discrete torus and a generalization of the generalized Macaulay theorem. SIAM J. Appl. Math. 33, 1 (1977), 55-59.
-
(1977)
Extremal configurations on a discrete torus and a generalization of the generalized Macaulay theorem.
, vol.33
, Issue.1
, pp. 55-59
-
-
Wang, D-L.1
Wang, P.2
-
28
-
-
79955452404
-
-
Ann. Prob.
-
Wierman, J.C. Percolation theory. Ann. Prob. 10, 3 (1982), 509-524.
-
(1982)
Percolation theory.
, vol.10
, Issue.3
, pp. 509-524
-
-
Wierman, J.C.1
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