Logic Test Pattern Generation Using Linear Codes

IEEE Transactions on Computers

Volumn C-33, Issue 9, 1984, Pages 845-850

  Tang, Donald T ^a   Chen, Chin Long ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

Author keywords

Exhaustive testing; linear codes; linear feedback shift registers; logic testing; LSSD; polynomial codes; projection subspace; scan path; self testing; test pattern generation; VLSI testing

Indexed keywords

CODES, SYMBOLIC; INTEGRATED CIRCUITS - TESTING;

TEST PATTERN GENERATION;

LOGIC CIRCUITS;

EID: 0021498142     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1984.1676501     Document Type: Article

References (12)

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