Accuracy of an Effective Channel Length/External Resistance Extraction Algorithm for MOSFET's

IEEE Transactions on Electron Devices

Volumn 31, Issue 9, 1984, Pages 1245-1251

  Laux, Steven E ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING - ALGORITHMS; COMPUTER SIMULATION;

EFFECTIVE CHANNEL LENGTH/EXTERNAL RESISTANCE EXTRACTION ALGORITHM; NUMERICAL SIMULATION;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0021482945     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1984.21695     Document Type: Article

References (7)

1. K. Terada and H. Muta, “A new method to determine effective MOSFET channel length,” Japan. J. Appl. Phys., vol. 18, no. 5, pp, 953–959, May 1979.
2. J.G.J. Chern, P. Chang, R. F. Motta, and N. Godinho, “A new method to determine MOSFET channel length,” IEEE Electron Device Lett., vol. EDL-1, no. 9, pp. 170–173, Sept. 1980.
3. E. Pan and F. F. Fang, “Lateral spread of ion-implanted impurities in silicon,” J. Appl. Phys., vol. 45, no. 6, pp. 2801–2803, June 1974.
4. S. Ogura, P. J. Tsang, W. W. Walker, D. L. Critchlow, and J. F. Shepard, “Design and characteristics of the lightly doped drain-source (LDD) insulated gate field-effect transistor,” IEEE Trans. Electron Devices, vol. ED-27, no. 8, pp. 1359–1367, Aug. 1980.
5. E. M. Buturla, P. E. Cottrell, B. M. Grossman, and K. A. Salsburg, “Finite-element analysis of semiconductor devices: The FIELDAY program,” IBM J. Res. Develop., vol. 25, no. 4, pp. 218–231, July 1981.
6. G. A. Sai-Halasz, private communication.
7. G. Baccarani and G. A. Sai-Halasz, “Spreading resistance in sub-micrometer MOSFET's,” IEEE Electron Device Lett., vol. EDL-4, no. 2, pp. 27–29, Feb. 1983.