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Volumn 19, Issue 4, 1984, Pages 519-525

Switch-induced Error Voltage on a Switched Capacitor

Author keywords

[No Author keywords available]

Indexed keywords

SWITCHED CAPACITOR;

EID: 0021477881     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1984.1052176     Document Type: Article
Times cited : (137)

References (8)
  • 2
    • 84881593757 scopus 로고
    • All-MOS charge redistribution analog-to-digital conversion techniques: Part II
    • Dec.
    • R. E. Suarez, P. R. Gray, and D. A. Hodges, “All-MOS charge redistribution analog-to-digital conversion techniques: Part II”, IEEE J. Solid-State Circuits, vol. SC-10, 379–385, Dec. 1975.
    • (1975) IEEE J. Solid-State Circuits , vol.SC-10 , pp. 379-385
    • Suarez, R.E.1    Gray, P.R.2    Hodges, D.A.3
  • 3
    • 0020291446 scopus 로고
    • An MOS switched-capacitor instrumentation amplifier
    • Dec.
    • R. C. Yen and P. R. Gray, “An MOS switched-capacitor instrumentation amplifier,” IEEE J: Solid-State Circuits, vol. SC-17, pp, 1008–1013, Dec. 1982.
    • (1982) IEEE J: Solid-State Circuits , vol.SC-17 , pp. 1008-1013
    • Yen, R.C.1    Gray, P.R.2
  • 4
    • 0019626245 scopus 로고
    • Interface states in MOSFET's due to hot-electron injection determined by the charge pumping technique
    • Oct.
    • D. Schmitt and G. Dorda, “Interface states in MOSFET’s due to hot-electron injection determined by the charge pumping technique,” Electron. Lett., vol, 17, no. 20, Oct. 1981.
    • (1981) Electron. Lett. , vol.17 , Issue.20
    • Schmitt, D.1    Dorda, G.2
  • 5
    • 0003369344 scopus 로고
    • SPICE2: A computer program to simulate semiconductor circuits
    • Univ. California, Berkeley, memo. ERL-M520, May
    • L. W. Nagel, “SPICE2: A computer program to simulate semiconductor circuits,” Electron. Res. Lab., Univ. California, Berkeley, memo. ERL-M520, May 1975.
    • (1975) Electron. Res. Lab.
    • Nagel, L.W.1
  • 6
    • 0043211490 scopus 로고
    • The simulation of MOS integrated circuits using SPICE2
    • Univ. California, Berkeley, memo. ERL-M80/7, Oct.
    • A. Vladimirescu and S. Liu, “The simulation of MOS integrated circuits using SPICE2,” Electron. Res. Lab., Univ. California, Berkeley, memo. ERL-M80/7, Oct. 1980.
    • (1980) Electron. Res. Lab.
    • Vladimirescu, A.1    Liu, S.2
  • 7
    • 0018027059 scopus 로고
    • A charge-oriented model for MOS transistor capacitances
    • Oct.
    • D. E. Ward and R. W. Dutton, “A charge-oriented model for MOS transistor capacitances,” IEEE J. Solid-State Circuits, vol. SC-13, pp. 703–708, Oct. 1978.
    • (1978) IEEE J. Solid-State Circuits , vol.SC-13 , pp. 703-708
    • Ward, D.E.1    Dutton, R.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.