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Volumn 1, Issue 1, 1984, Pages 30-40

IBM's Engineering Design System Support for VLSI Design and Verification

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS, VLSI;

EID: 0021378403     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.1984.5005573     Document Type: Article
Times cited : (14)

References (23)
  • 2
    • 84947669063 scopus 로고
    • Design Verification System for Large Scale LSI Systems
    • June
    • M. Monachino, “Design Verification System for Large Scale LSI Systems,” Proc. 19th Design Automation Conf., June 1982, pp. 83-90.
    • (1982) Proc. 19th Design Automation Conf. , pp. 83-90
    • Monachino, M.1
  • 4
    • 0019896150 scopus 로고
    • Boolean Comparison of Hardware and Flowcharts
    • Jan.
    • G. L. Smith, R. J. Bahnsen, and H. Halliwell, “Boolean Comparison of Hardware and Flowcharts,” IBM J. Research and Development, Vol. 26, No. 1, Jan. 1982, pp. 106-116.
    • (1982) IBM J. Research and Development , vol.26 , Issue.1 , pp. 106-116
    • Smith, G.L.1    Bahnsen, R.J.2    Halliwell, H.3
  • 5
    • 84989495069 scopus 로고
    • Timing Verification and the Timing Analysis Program
    • June
    • R. B. Hitchcock, “Timing Verification and the Timing Analysis Program,” Proc. 19th Design Automation Conf., June 1982, pp. 594-604.
    • (1982) Proc. 19th Design Automation Conf. , pp. 594-604
    • Hitchcock, R.B.1
  • 6
    • 0019612259 scopus 로고
    • Design Automation in IBM
    • Sept.
    • P. W. Case et al., “Design Automation in IBM,” IBM J. Research and Development, Vol. 25, No. 5, Sept. 1981, pp. 631-646.
    • (1981) IBM J. Research and Development , vol.25 , Issue.5 , pp. 631-646
    • Case, P.W.1
  • 8
    • 84939319670 scopus 로고
    • Interactive Design Language: A Unified Approach to Hardware Simulation, Synthesis, and Documentation
    • L. I. Maissel and D. L. Ostapko, “Interactive Design Language: A Unified Approach to Hardware Simulation, Synthesis, and Documentation,” Proc. 19th Design Automation Conf., 1982, pp. 193-201.
    • (1982) Proc. 19th Design Automation Conf. , pp. 193-201
    • Maissel, L.I.1    Ostapko, D.L.2
  • 10
    • 0020877401 scopus 로고
    • Introduction to the IBM Los Gatos Logic Simulation Engine
    • Oct.
    • J. K. Howard, R. L. Malm, and L. M. Warren, “Introduction to the IBM Los Gatos Logic Simulation Engine,” Proc. IEEE ICCD, Oct. 1983, pp. 580-583.
    • (1983) Proc. IEEE ICCD , pp. 580-583
    • Howard, J.K.1    Malm, R.L.2    Warren, L.M.3
  • 13
    • 33747475453 scopus 로고
    • Development and Application of a Designer Oriented Cyclic Simulator
    • June
    • G. Parasch and R. Price, “Development and Application of a Designer Oriented Cyclic Simulator,” Proc. 13th Design Automation Conf., June 1976, pp. 48-53.
    • (1976) Proc. 13th Design Automation Conf. , pp. 48-53
    • Parasch, G.1    Price, R.2
  • 14
    • 0019595845 scopus 로고
    • Logic Synthesis Through Local Transformations
    • July
    • J. A. Darringer et al., “Logic Synthesis Through Local Transformations,” IBM J. Research and Development, Vol. 25, No. 5, July 1981, pp. 272-280.
    • (1981) IBM J. Research and Development , vol.25 , Issue.5 , pp. 272-280
    • Darringer, J.A.1
  • 15
    • 0020633648 scopus 로고
    • An Overview of the Design and Verification Subsystem of the Engineering Design System
    • June
    • L. N. Dunn, “An Overview of the Design and Verification Subsystem of the Engineering Design System,” Proc. 20th Design Automation Conf., June 1983, pp. 237-238.
    • (1983) Proc. 20th Design Automation Conf. , pp. 237-238
    • Dunn, L.N.1
  • 17
    • 0020633647 scopus 로고
    • A Logic Design Front-End for Improved Engineering Productivity
    • June
    • P. Horstmann and F. Rubin, “A Logic Design Front-End for Improved Engineering Productivity,” Proc. 20th Design Automation Conf., June 1983, pp. 239-245.
    • (1983) Proc. 20th Design Automation Conf. , pp. 239-245
    • Horstmann, P.1    Rubin, F.2
  • 18
    • 0020544293 scopus 로고
    • Structured Design Verification: Function and Timing
    • June
    • D. Cheng et al., “Structured Design Verification: Function and Timing,” Proc. 20th Design Automation Conf., June 1983, pp. 246-252.
    • (1983) Proc. 20th Design Automation Conf. , pp. 246-252
    • Cheng, D.1
  • 21
    • 84947663390 scopus 로고
    • Technical Report TRO1.1338, IBM System Products Division Laboratory, Endicott, N.Y.
    • P. N. Agnew and M. Kelly, “The VMS Algorithm,” Technical Report TRO1.1338, IBM System Products Division Laboratory, Endicott, N.Y., 1970.
    • (1970) “The VMS Algorithm,”
    • Agnew, P.N.1    Kelly, M.2
  • 23
    • 0017439680 scopus 로고
    • Automatic Checking of Logic Design Structures for Compliance with Testability Ground Rules
    • June
    • H. C. Godoy, G. B. Franklin, and P.S. Bottorff, “Automatic Checking of Logic Design Structures for Compliance with Testability Ground Rules,” Proc. 14th Design Automation Conf., June 1977, pp. 469-478.
    • (1977) Proc. 14th Design Automation Conf. , pp. 469-478
    • Godoy, H.C.1    Franklin, G.B.2    Bottorff, P.S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.