An Improved Frequency Compensation Technique for CMOS Operational Amplifiers

IEEE Journal of Solid-State Circuits

Volumn 18, Issue 6, 1983, Pages 629-633

  Ahuja, Bhupendra K ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS OPERATIONAL AMPLIFIERS;

AMPLIFIERS, OPERATIONAL;

EID: 0020906580     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1983.1052012     Document Type: Article

References (5)

1. R. Gregorian and G. Amir, “A single chip speech synthesizer using a switched-capacitor multiplier,” IEEE J. Solid-State Circuits, vol. SC-18, pp. 65-75, Feb. 1983.
2. B. K. Ahuja et al., “A single chip CMOS PCM codec with filters,” in ISSCC Dig. Tech. Papers, pp. 242-243, Feb. 1981.
3. P. R. Gray, “Basic MOS operational amplifier design–An overview,” in Analog MOS Integrated Circuits. New York: IEEE Press, 1980, pp. 28-49.
4. D. Senderowicz, D. A. Hodges, and P. R. Gray, “A high performance NMOS operational amplifier,” IEEE J. Solid-State Circuits, vol. SC-13, pp. 760-768, Dec. 1978.
5. W. C. Black et al., “A high performance low power CMOS channel filter,” IEEE J. Solid-State Circuits, vol. SC-15, pp. 929-938, Dec. 1980.