AUTOMATIC VERIFICATION OF FINITE STATE CONCURRENT SYSTEMS USING TEMPORAL LOGIC SPECIFICATIONS: A PRACTICAL APPROACH.

Conference Record of the Annual ACM Symposium on Principles of Programming Languages

Volumn , Issue , 1983, Pages 117-126

  Clarke, E M ^a   Emerson, E A ^a   Sistla, A P ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ALTERNATING BIT PROTOCOL; AUTOMATIC VERIFICATION; CTL SPECIFICATION LANGUAGE; FINITE-STATE CONCURRENT SYSTEMS; MODEL CHECKER; TEMPORAL LOGIC SPECIFICATIONS;

COMPUTER PROGRAMMING;

EID: 0020900726     PISSN: 07308566     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)