The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors

IEEE Transactions on Computers

Volumn C-32, Issue 10, 1983, Pages 902-910

  Rosenberg, Arnold L ^a  

^a DUKE UNIVERSITY   (United States)

Author keywords

Arrays of processors; design for testability; dynamic fault tolerance; fault tolerant design; grids of processors; linear arrays of processors; reconfigurable designs; trees of processors

Indexed keywords

COMPUTER SYSTEMS, DIGITAL;

EID: 0020834827     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1983.1676134     Document Type: Article

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