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1
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84942218979
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presented at the Device Research Conf., Ithaca, NY, June
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C. G. Sodini, B. Hoefflinger, T. W. Ekstedtd, and J. L. Moll, “Charge accumulation and mobility in thin dielectric MIS Iranssistors,” presented at the Device Research Conf., Ithaca, NY, June 1980;
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(1980)
Charge accumulation and mobility in thin dielectric MIS Iranssistors
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Sodini, C.G.1
Hoefflinger, B.2
Ekstedtd, T.W.3
Moll, J.L.4
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2
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0020186076
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Solid-State Electron.
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Sept.
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C. G. Sodini, T. W, Ekstedtd, and J. Moll, Solid-State Electron., vol. 25, pp. 833-841, Sept. 1982.
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(1982)
, vol.25
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Sodini, C.G.1
Ekstedtd, T.W.2
Moll, J.3
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3
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6044234792
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Design of micron MOS switching devices
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Dec.
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R. H. Dennard, F. H. Gaensslen, L. Kuhn, and H. N. Yu, “Design of micron MOS switching devices,” in IEDM Tech. Dig., Dec. 1972.
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IEDM Tech. Dig.
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Dennard, R.H.1
Gaensslen, F.H.2
Kuhn, L.3
Yu, H.N.4
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4
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0016116644
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Design of ion-implanted MOSFET's with very small physical dimensions
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Oct.
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R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E. Bassous, and A. Le Blanc, “Design of ion-implanted MOSFET's with very small physical dimensions,” IEEE J. Solid-State Circuits, vol. SC-9, pp. 256-268, Oct. 1974.
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IEEE J. Solid-State Circuits
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, pp. 256-268
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Dennard, R.H.1
Gaensslen, F.H.2
Yu, H.N.3
Rideout, V.L.4
Bassous, E.5
Le Blanc, A.6
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5
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36849131222
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Calculation of the space charge, electric field, and free carrier concentration at the surface of a semiconductor
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June
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R. H. Kingston and F. S. Neustadter, “Calculation of the space charge, electric field, and free carrier concentration at the surface of a semiconductor,” J. Appl. Phys., vol. 26, pp. 718-720, June 1955.
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J. Appl. Phys.
, vol.26
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Kingston, R.H.1
Neustadter, F.S.2
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6
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0001332108
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Space charge calculations for semiconductors
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July
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R. Seiwatz and M. Green, “Space charge calculations for semiconductors,” J. Appl. Phys., vol. 29, pp. 1034-1040, July 1958.
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(1958)
J. Appl. Phys.
, vol.29
, pp. 1034-1040
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Seiwatz, R.1
Green, M.2
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7
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34547827353
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Properties of semiconductor surface inversion layers in the electric quantum limit
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Nov.
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F. Stern and W. E. Howard, “Properties of semiconductor surface inversion layers in the electric quantum limit,” Phys. Rev., vol. 163, pp. 816-835, Nov. 1967.
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Phys. Rev.
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Stern, F.1
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8
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0001156050
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Self-consistent results for n-type silicon inversion layers
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June
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F. Stern, “Self-consistent results for n-type silicon inversion layers,” Phys. Rev. B, vol. 5, pp. 4891-4899, June 1972.
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(1972)
Phys. Rev. B
, vol.5
, pp. 4891-4899
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Stern, F.1
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9
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49849110942
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Iteration methods for calculating self-consistent fields in semiconductor inversion layers
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F. Stern, “Iteration methods for calculating self-consistent fields in semiconductor inversion layers,” J. Comput. Phys., vol. 6, pp. 56-67, 1970.
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J. Comput. Phys.
, vol.6
, pp. 56-67
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Stern, F.1
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10
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0000142320
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Magneto-oscillatory conductance in silicon surfaces
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A. B. Fowler, F. F. Fang, W. E. Howard, and P. J. Stiles, “Magneto-oscillatory conductance in silicon surfaces,” Phys. Rev. Lett., vol. 16, pp. 901-903, 1966.
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Phys. Rev. Lett.
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Fowler, A.B.1
Fang, F.F.2
Howard, W.E.3
Stiles, P.J.4
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11
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0017466169
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Very small MOSFET's for low-temperature operation
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Mar.
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F. H. Gaensslen, V. L. Rideout, E. J. Walker, and J. J. Walker, “Very small MOSFET's for low-temperature operation,” IEEE Trans. Electron Devices, vol. ED-24, pp. 218-229, Mar. 1977.
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IEEE Trans. Electron Devices
, vol.ED-24
, pp. 218-229
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Gaensslen, F.H.1
Rideout, V.L.2
Walker, E.J.3
Walker, J.J.4
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12
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84942218980
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presented at the Device Research Conf., Ft. Collins, CO, June 21-23
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G. Baccarani, M. R. Wordeman, and R. H. Dennard, “Generalized scaling theory and its application to a ¼ micron MOSFET design,” presented at the Device Research Conf., Ft. Collins, CO, June 21-23, 1982.
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(1982)
Generalized scaling theory and its application to a ¼ micron MOSFET design
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Baccarani, G.1
Wordeman, M.R.2
Dennard, R.H.3
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13
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49949134400
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Effects of diffusion current on characteristics of metal-oxide (insulator) semiconductor transistors
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H. C. Pao and C. T. Sah, “Effects of diffusion current on characteristics of metal-oxide (insulator) semiconductor transistors,” Solid-State Electron., vol. 9, pp. 927-937, 1966.
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Solid-State Electron.
, vol.9
, pp. 927-937
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Pao, H.C.1
Sah, C.T.2
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14
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0016621575
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Static characteristics of extremely thin gate oxide MOS transistors
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Y. Hayashi, “Static characteristics of extremely thin gate oxide MOS transistors,” Electron. Lett., vol. 11, pp. 618-620, 1975.
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Electron. Lett.
, vol.11
, pp. 618-620
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Hayashi, Y.1
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15
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84942218981
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private communication
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F. Stern, private communication.
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Stern, F.1
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16
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0018457220
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Temperature dependent threshold behavior of depletion mode MOSFET's
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F. H. Gaensslen and R. C. Jaeger, “Temperature dependent threshold behavior of depletion mode MOSFET's,” Solid-State Electron., vol. 22, pp. 423-430, 1979.
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Solid-State Electron.
, vol.22
, pp. 423-430
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Gaensslen, F.H.1
Jaeger, R.C.2
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17
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84939383977
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The Si-SiO2 interface-Electrical properties as determined by the metal-insulator-silicon conductance technique
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July-Aug.
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E. H. Nicollian and A. Goetzberger, “The Si-SiO2 interface-Electrical properties as determined by the metal-insulator-silicon conductance technique,” Bell Syst. Tech. J., vol. 46, pp. 10551133, July-Aug. 1967.
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Bell Syst. Tech. J.
, vol.46
, pp. 1055-1133
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Nicollian, E.H.1
Goetzberger, A.2
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18
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0019048875
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Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
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Aug.
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S. C. Sun and J. D. Plummer, “Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces,” IEEE Trans. Electron Devices, vol. ED-27, pp. 1497-1508, Aug. 1980.
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IEEE Trans. Electron Devices
, vol.ED-27
, pp. 1497-1508
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Sun, S.C.1
Plummer, J.D.2
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19
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0018683243
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Characterization of the electron mobility in the inverted <100> Si surface
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Dec.
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A. G. Sabnis and J. T. Clemens, “Characterization of the electron mobility in the inverted <100> Si surface,” in IEDM Tech. Dig., pp. 18-21, Dec. 1979.
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(1979)
IEDM Tech. Dig.
, pp. 18-21
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Sabnis, A.G.1
Clemens, J.T.2
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20
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84942218982
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private communication
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R. W. Keyes, private communication.
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Keyes, R.W.1
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21
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0019687659
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Limits to scaling MOS devices
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Sept. also “MOS device and technology constraints in VLSI,” IEEE Trans. Electron Devices, vol. ED-29, pp. 567-573, Apr. 1982
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Y. A. El-Mansy, “Limits to scaling MOS devices,” in 1981 Symp. VLSI Tech. Dig. Tech. Papers, pp. 16-17, Sept. 1981; also “MOS device and technology constraints in VLSI,” IEEE Trans. Electron Devices, vol. ED-29, pp. 567-573, Apr. 1982.
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(1981)
1981 Symp. VLSI Tech. Dig. Tech. Papers
, pp. 16-17
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El-Mansy, Y.A.1
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22
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84910922832
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l-µm MOSFET VLSI technology: Part II-Device designs and characteristics for high-performance logic applications
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Apr.
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R. H. Dennard, F. H. Gaensslen, E. J. Walker, and P. W. Cook, “l-µm MOSFET VLSI technology: Part II-Device designs and characteristics for high-performance logic applications,” IEEE J. Solid-State Circuits, vol. SC-14, pp. 247-255, Apr. 1979.
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(1979)
IEEE J. Solid-State Circuits
, vol.SC-14
, pp. 247-255
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Dennard, R.H.1
Gaensslen, F.H.2
Walker, E.J.3
Cook, P.W.4
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23
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0018963915
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Interpretation of C-V measurements for determining the doping profile in semiconductors
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G. Baccarani, M. Rudan, G. Spadini, H. Maes, W. Vandervorst, and R. J. Van Overstraeten, “Interpretation of C-V measurements for determining the doping profile in semiconductors,” Solid-State Electron., vol. 23, pp. 65-71, 1980.
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Solid-State Electron.
, vol.23
, pp. 65-71
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Baccarani, G.1
Rudan, M.2
Spadini, G.3
Maes, H.4
Vandervorst, W.5
Van Overstraeten, R.J.6
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