Threshold Voltage of Thin-Film Silicon-on-lnsulator (SOI) MOSFET's

IEEE Transactions on Electron Devices

Volumn 30, Issue 10, 1983, Pages 1244-1251

  Lim, Hyung Kyu ^a   Member, Student ^a   Fossum, Jerry G ^a  

^a UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SILICON ON INSULATOR; THRESHOLD VOLTAGE;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0020830319     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1983.21282     Document Type: Article

References (15)

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2. B.-Y. Tsaur, M. W. Geis, J.C. C. Fan, D. J. Silversmith, and P. W. Mountain, “n-Channel deep-depletion metal-oxide-semiconductor field-effect transistors fabricated in zone-melting-recrystallized polycrystalline Si films on SiO2,” Appl. Phys. Lett., vol. 39, pp. 909-911, Dec. 1981.
3. H.-W. Lam, A. F. Tasch, Jr., and R. F. Pinizzotto, “Silicon-on-insulator for VLSI and VHSIC,” in VLSI Electronics: Microstructure Science, vol. 4. New York: Academic Press, 1982.
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7. P. W. Barth, “Dielectric isolation technology for bipolar and MOS integrated circuits,” Technical Report No. SEL-80-JBA-1, Stanford Electronics Laboratories, Stanford University, Mar. 1980.
8. E. Sano, K. Ohwada, and T. Kimura, “A buried-channel/surface channel CMOS IC isolated by an implanted silicon dioxide layer,” IEEE Trans. Electron Devices, vol. ED-29, pp. 459-461, Mar. 1982.
9. S.M. Sze, Physics of Semiconductor Devices, 2nd ed. New York: Wiley, 1981.
10. L. A. Akers and J. J. Sanchez, “Threshold voltage model of short, narrow and small geometry MOSFET's: A review,” Solid-State Electron., vol. 25, pp. 621-641, 1982.
11. H.-W. Lam, private communication.
12. H.-K. Lim, unpublished work.
13. H.-W. Lam, Z. P. Sobczak, R. F. Pinizzotto, and A. F. Tasch, Jr., “Device fabrication in |l00} silicon-on-oxide produced by a scanning CW-laser-induced lateral seeding technique,” IEEE Trans. Electron Devices, vol. ED-29, pp. 389-394, Mar. 1982.
14. Y. Tsividis, “Moderate inversion in MOS devices,” Solid-State Electron., vol. 25, pp. 1099-1104, 1982.
15. J. G. Fossum, A. Ortiz, H.-K. Lim, and H.-W. Lam, “Effects of grain boundaries on channel conduction in thin-film SOI MOSFET's,” presented at SPIE Technical Symp. (Los Angeles, CA); also SPIE Proc., vol. 385, Jan. 1983.