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Volumn 30, Issue 4, 1983, Pages 247-248

Memory Requirements for the Hardware Implementation of Decimators

Author keywords

decimators; Digital filters; hardware implementation

Indexed keywords

ELECTRIC FILTERS, DIGITAL;

EID: 0020738208     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCS.1983.1085346     Document Type: Article
Times cited : (2)

References (5)
  • 1
    • 0016588155 scopus 로고
    • Optimum FIR digital filter implementation for decimation, interpolation and narrow-band filtering
    • Oct.
    • R. E. Crochiere and L. R. Rabiner, “Optimum FIR digital filter implementation for decimation, interpolation and narrow-band filtering,” IEEE Trans. Acoustics, Speech, Signal Processing, vol. ASSP-23, Oct. 1975.
    • (1975) IEEE Trans. Acoustics, Speech, Signal Processing , vol.ASSP-23
    • Crochiere, R.E.1    Rabiner, L.R.2
  • 3
    • 0019543409 scopus 로고
    • Interpolation and decimation of digital signals–A tutorial review
    • Mar.
    • R. E. Crochiere and L. R. Rabiner, “Interpolation and decimation of digital signals–A tutorial review,” Proc. IEEE, vol. 69, Mar. 1981.
    • (1981) Proc. IEEE , vol.69
    • Crochiere, R.E.1    Rabiner, L.R.2
  • 5
    • 0019177551 scopus 로고
    • A limited range discrete Fourier transform algorithm
    • Apr.
    • J. W. Cooley and S. Winograd, “A limited range discrete Fourier transform algorithm,” Proc. ICASSP' 80, vol. I, pp. 213-217, Apr. 1980.
    • (1980) Proc. ICASSP' 80 , vol.1 , pp. 213-217
    • Cooley, J.W.1    Winograd, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.