UNIFYING VLSI ARRAY DESIGNS WITH GEOMETRIC TRANSFORMATIONS.

Proceedings of the International Conference on Parallel Processing

Volumn , Issue , 1983, Pages 448-457

  Cappello, Peter R ^a   Steiglitz, Kenneth ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

AFFINE TRANSFORMATIONS; GEOMETRIC TRANSFORMATIONS; POLYNOMIAL PRODUCT COMPUTATIONS; SYSTOLIC DESIGNS; THREE-DIMENSIONAL VECTOR SPACE; VLSI ARRAY DESIGNS;

COMPUTER SYSTEMS, DIGITAL;

EID: 0020588185     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)