Multiple-valued Decomposition of Generalized Boolean Functions and the Complexity of Programmable Logic Arrays

IEEE Transactions on Computers

Volumn C-30, Issue 9, 1981, Pages 635-643

  Sasao, Tsutomu ^a  

^a OSAKA UNIVERSITY   (Japan)

Author keywords

Complexity of logic circuits; functional decomposition; multiple valued logic; programmable logic array; symmetric function

Indexed keywords

PROGRAMMABLE LOGIC ARRAYS;

LOGIC CIRCUITS;

EID: 0019609761     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1981.1675861     Document Type: Article

References (5)

1. H. Fleisher and L. I. Maissel, “An introduction to array logic,” IBM J. Res. Develop., vol. 19, pp. 98–109, Mar. 1975.
2. S. J. Hong, R. G. Cain, and D. L. Ostapko, “MINI: A heuristic approach for logic minimization,” IBM J. Res. Develop., vol. 18, pp. 443–458, Sept. 1974.
3. D. L. Greer, “An associative logic matrix,” IEEE J. Solid-State Circuits, vol. SC-11, pp. 679–691, Oct. 1976.
4. R. A. Wood, “High-speed dynamic programmable logic array chip,” IBM J. Res. Develop., vol. 19, pp. 379–383, July 1975.
5. R. L. Ashenhurst, “The decomposition of switching functions,” in Proc. Int. Symp. Theory of Switching, vol. 29, Ann. Comput. Lab., Harvard Univ., Cambridge, MA, Apr. 2–5, 1957, pp. 74–116.