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Volumn C-30, Issue 7, 1981, Pages 478-490

Trace Scheduling: A Technique for Global Microcode Compaction

Author keywords

global microcode optimization; Index Terms Data dependency; microcode compaction; parallel instruction scheduling; parallel processing; resource conflict

Indexed keywords

COMPUTER ARCHITECTURE;

EID: 0019596071     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1981.1675827     Document Type: Article
Times cited : (656)

References (15)
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    • J. A. Fisher, “The optimization of horizontal microcode within and beyond basic blocks: An application of processor scheduling with resources,” Courant Math. Comput. Lab., New York Univ., U.S. Dep. of Energy Rep. COO-3077-161, Oct. 1979.
    • Fisher, J.A.1
  • 3
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    • Methods of compacting microprograms
    • Ph.D. dissertation, Univ. of Southwestern Louisiana, Lafayette Dec.
    • P. W. Mallett, “Methods of compacting microprograms,” Ph.D. dissertation, Univ. of Southwestern Louisiana, Lafayette, Dec. 1978.
    • Mallett, P.W.1
  • 6
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    • Deterministic processor scheduling
    • Sept.
    • M. J. Gonzalez, Jr., “Deterministic processor scheduling,” Comput. Surveys, vol. 9, pp. 173–204, Sept. 1977.
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    • Gonzalez, M.J.1
  • 7
    • 0016313256 scopus 로고
    • A comparison of list schedules for parallel processing systems
    • Dec.
    • T. L. Adam, K. M. Chandy, and J. R. Dickson, “A comparison of list schedules for parallel processing systems,” Commun. Ass. Comput. Mach., vol. 17, pp. 685–690, Dec. 1974.
    • (1974) Commun. Ass. Comput. Mach , vol.17 , pp. 685-690
    • Adam, T.L.1    Chandy, K.M.2    Dickson, J.R.3
  • 8
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    • Percolation of code to enhance parallel dispatching and execution
    • Dec.
    • C. C. Foster and E. M. Riseman, “Percolation of code to enhance parallel dispatching and execution,” IEEE Trans. Comput., vol. C-21, pp. 1411–1415, Dec. 1972.
    • (1972) IEEE Trans. Comput , vol.C-21 , pp. 1411-1415
    • Foster, C.C.1    Riseman, E.M.2
  • 9
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    • The inhibition of potential parallelism by conditional jumps
    • Dec.
    • E. M. Riseman and C. C. Foster, “The inhibition of potential parallelism by conditional jumps,” IEEE Trans. Comput., vol. C-21, pp. 1405–1411, Dec. 1972.
    • (1972) IEEE Trans. Comput , vol.C-21 , pp. 1405-1411
    • Riseman, E.M.1    Foster, C.C.2
  • 12
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    • The organization of microprogram stores
    • Mar.
    • S. Dasgupta, “The organization of microprogram stores,” ACM Comput. Surveys, vol. 11, pp. 39–65, Mar. 1979.
    • (1979) ACM Comput. Surveys , vol.11 , pp. 39-65
    • Dasgupta, S.1
  • 14
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    • Global optimization of microprograms through modular control constructs
    • G. Wood, “Global optimization of microprograms through modular control constructs,” in Proc. 12th Annu. Microprogramming Workshop, SIGMICRO, 1979, pp. 1–6.
    • (1979) Proc. 12th Annu. Microprogramming Workshop, SIGMICRO , pp. 1-6
    • Wood, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.