An approximate model for the graded-base transistor

Solid State Electronics

Volumn 24, Issue 2, 1981, Pages 165-171

  Grung, B L ^a  

^a HONEYWELL TECHNOLOGY CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

TRANSISTORS;

EID: 0019529997     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(81)90013-7     Document Type: Article

References (39)

1. Merged-transistor logic (MTL)-a low-cost bipolar logic concept
2. Integrated injection logic: a new approach to LSI
3. Base current of I/sup 2/L transistors
4. The injection model-a structure-oriented model for merged transistor logic (MTL)
5. Device physics of integrated injection logic
6. Processing technology and AC/DC characteristics of linear compatible I/sup 2/L
7. Functional modeling of integrated injection logic—DC analysis
8. Vertical current components in integrated injection logic
9. 2L at low current levels
10. A simple model for the determination of I/sup 2/L base current components
11. Modelling and optimization of the oxide isolated substrate fed I/sup 2/L structure
12. Integrated injection logic for a linear/digital LSI environment
13. Functional modeling of integrated injection logic—Transient analysis
14. An investigation of the intrinsic delay (speed limit) in MTL/I/sup 2/L
15. Determination of physical parameters of diffusion and drift transistors
16. Determination of the physical parameters of transistors of single- and double-diffused structure
17. Optimum doping distribution for minimum base transit time
18. Optimum impurity distribution for minimum base transit time in junction transistors
19. Current and base transit-time relations in normal and inverted (IIL) bipolar transistors
20. Comments on "Current and base transit-time relations in normal and inverted (IIL) bipolar transistors"
21. Carrier mobilities in silicon empirically related to doping and field