General Theory of Metastable Operation

IEEE Transactions on Computers

Volumn C-30, Issue 2, 1981, Pages 107-115

  Marino, Leonard R ^a  

^a SAN DIEGO STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SWITCHING THEORY;

EID: 0019529966     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.1981.6312173     Document Type: Article

References (8)

1. I. Catt, “Time loss through gating of asynchronous logic signal pulses,” IEEE Trans. Electron. Comput., vol. EC-15, pp. 108-111, Feb. 1966.
2. T. J. Chaney, S. M. Ornstein, and W. M. Littlefield, “Beware the synchronizer,” presented at IEEE Compcon 1972, San Francisco, CA, Sept. 12-14, 1972.
3. T. J. Chaney and C. E. Molnar, “Anomalous behavior of synchronizer and arbiter circuits,” IEEE Trans. Comput, vol. C-22, pp. 421-422, Apr. 1973.
4. L. R. Marino, “The effect of asynchronous inputs on sequential network reliability,” IEEE Trans. Comput., vol. C-26, pp. 1082-1090, Nov. 1977.
5. M. Pechoucek, “Anomalous response times of input synchronizers,” IEEE Trans. Comput., vol. C-25, pp. 133-139, Feb. 1976.
6. M. Hurtado and D. L. Elliott, “Ambiguous behavior of logic bistable systems,” in Proc. 13th Annu. Allerton Conf. Circuit and Syst. Theory, Oct. 1975.
7. E. G. Wormald, “A note on synchronizer and interlock maloperation,” IEEE Trans. Comput., vol. C-26, pp. 317-318, Mar. 1977.
8. T. J. Chaney, “Comments on 'A note on synchronizer and interlock maloperation,'” IEEE Trans. Comput., vol. C-28, pp. 802-804, Oct. 1979.