A Multilayer Ceramic Multichip Module

IEEE Transactions on Components, Hybrids, and Manufacturing Technology

Volumn 3, Issue 4, 1980, Pages 634-637

  Blodgett, Albert J ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING;

EID: 0019147952     PISSN: 01486411     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCHMT.1980.1135663     Document Type: Article

References (5)

1. B. Schwartz and D. L. Wilcox, “Laminated ceramics,” in Proc. Electronics Components Conf., 1967, pp. 17–26.
2. H. D. Kaiser, F. J. Pakulski, and A. F. Schmeckenbecher, “A fabrication technique for multilayer ceramic modules,” Solid State Technol., pp. 35–40, May 1972.
3. E. Bloch, “Very large scale integration for the 1980's,” presented at the 1979 Electronics Components Conf.
4. L. F. Miller, “Controlled collapse reflow chip joining,” IBM J. Res. Develop., vol. 13, pp. 239–250, 1969.
5. P. A. Totta and R. P. Sopher, “SLT device metallurgy and its monolithic extension,” IBM J. Res. Develop., vol. 13, pp. 226–238, 1969.