Charge-Pump Phase-Lock Loops

IEEE Transactions on Communications

Volumn 28, Issue 11, 1980, Pages 1849-1858

  Gardner, Floyd M ^a  

^a NONE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE PUMP CIRCUITS;

PHASE LOCKED LOOPS;

EID: 0019079092     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCOM.1980.1094619     Document Type: Article

References (11)

1. R. C. E. Thomas, “Frequency comparator performs double duty.” EDN, 29 – 32, Nov. J. 1970
2. J. I. Brown, “A digital phase and frequency-sensitive detector.” Proc. IEEE. vol. 59. p. 717, Apr. 1971
3. Phase-Locked Loop Data Book. 2nd ed. Motorola. Inc., Aug. 1973
4. D. K. Morgan and G. Steudel, “The RCA COS/MOS phase-locked-loop,.” RCA, Somerville. NJ, Application Note ICAN-6101. Oct. 1972
5. C. A. Sharpe, “A 3-state phase detector can improve your next PLL design,” END, pp. 55 - 59 Sept. 1976
6. F. M. Gardner, Phaselock Techniques, 2nd ed. New York : Wiley, 1979
7. P. Lue, “A multispeed digital regenerative repeater for digital data transmission” in Conf. Rec., 1979 Nat. Telecommun Conf., paper 14.1
8. J. A. Afonso, A. J. Quiterio, and D. S. Arantes, “A phase-locked loop with digital frequency comparator for timing signal recovery,” in Conf. Rec., 1979 Nat. Telecommun. Conf., paper 14.4
9. J. Tal, “Speed control by phase-locked servo systems-New possibilities and limitations.” IEEE Trans. Ind. Electron. Contr. Instrum vol. IECI-24. pp. 118 – 125, Feb. 1977
10. A. J. Viterbi, Principles of Coherent Communication. New York : McGraw-Hill, 1966, ch. 3
11. J. T. Tou, Digital and Sampled-Data Control Systems. New York : McGraw-Hill, 1959