A High-Speed Low-Cost Modulo Pi Multiplier with RNS Arithmetic Applications

Proceedings of the IEEE

Volumn 68, Issue 4, 1980, Pages 529-532

  Soderstrand, Michael A ^a   Vernia, Carmel ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SIGNAL PROCESSING;

EID: 0019008835     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/PROC.1980.11678     Document Type: Article

References (16)

1. K. H. O'Keefe, “A digital signal processor which uses the residue number system,” in Proc. 1971 Mexico IEEE Int. Symp. Systems, Networks, and Computers, Oaxtepec, Mexico, vol. 2, pp. 669–673, Jan. 19–21, 1971.
2. M. A. Soderstrand, “High-speed digital filters using residue number arithmetic,” in Proc. 9th Asilomar Conf. Circuits, Systems, and Computers (Pacific Grove, CA), pp. 416–420, Nov. 1975.
3. W. K. Jenkins and B. J. Leon “The use of the residue number system in the design of finite impulse response digital filters,” IEEE Trans. Circuits Syst., vol. CAS-24, pp. 191–201, Apr. 1977.
4. G. A. Jullien, W. C. Miller, J. J. Soltio, A. Baraniecka, and B. Tseng, “Hardware realization of digital processing elements using the residue number system,” in Proc. IEEE Int. Conf. Acoustics, Speech, and Signal Processing (Hartford, CT), pp. 506–510, May 9–11, 1977.
5. M. A. Soderstrand and E. L. Fields, “Tenth-order digital filter using residue number arithmetic,” in Proc. 20th Midwest Symp. Circuits and Systems (Lubbock, TX), pp. 899–903, Aug. 1977.
6. W. K. Jenkins, “A technique for high precision digital filtering with multiple 8-bit microprocessures,” in Proc. 20th Midwest Symp. Circuits and Systems (Lubbock, TX), pp. 58–62, Aug. 1977.
7. G. A. Jullien “Residue number scaling and other operations using ROM arrays,” IEEE Trans. Comput., vol. 27, pp. 325–336, Apr. 1979.
8. M. A. Soderstrand, “Applications of microprocessors in digital signal processing,” in Proc. 21st Midwest Symp. Circuits and Systems (Ames, IA), pp. 153–157, Aug. 1978.
9. A. Baraniecka and G. A. Jullien “On decoding techniques for residue number systems realizations of digital signal processing hardware,” IEEE Trans. Circuits Syst., vol. CAS-25, pp. 935–936, Nov. 1978.
10. A. S. Fraenkel “Use of index calculus and mersenne primes for the design of a high speed digital multiplier,” J. Ass. Comput. Mach., vol. 8, no. 1, pp. 87–96, Jan. 1961.
11. R. L. Beadles, “A residue class arithmetic multiplication algorithm for prime number moduli,” M.S.E.E. thesis, Univ. Pittsburg, Pittsburgh, PA, 1966.
12. N. W. Szabo and R. E. Tanaka, Residue Number Arithmetic and its Application to Computer Technology. New York: McGraw-Hill, 1967.
13. I. A. Miller, A. S. Soltes, and R. E. Scott, “Wide-band analog function multiplier,” Electronics, vol. 28, 1955.
14. H. Nussbaumer “Digital filters using read-only memories,” Electron. Lett., vol. 11, pp. 294–295, 1976.
15. M. A. Soderstrand and E. L. Fields “Multipliers for residue number arithmetic digital filters,” Electron. Lett., vol. 13, pp. 164–166, Mar. 1977.
16. i multiplier with RNS arithmetic applications,” 1980 IEEE Int. Symp. Circuits and Systems, Houston, TX, Apr. 1980.