Calculation of Parameter Values from Node Voltage Measurements

IEEE Transactions on Circuits and Systems

Volumn 26, Issue 7, 1979, Pages 466-474

  Trick, Timothy N ^a   Mayeda, Wataru ^a   Sakla, Adel A ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT ANALYSIS;

ELECTRIC NETWORKS;

EID: 0018496008     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCS.1979.1084660     Document Type: Article

References (12)

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2. G. O. Martens and J. D. S. Dyck, “Fault identification in electronic circuits with the aid of bilinear transformations,” IEEE Trans. Rel., vol. R-21, pp. 99–104, May 1972.
3. R. Saeks and S. R. Liberty, Eds., Rational Fault Analysis. New York: Marcel Dekker, 1977.
4. S. Seshu and R. Waxman, “Fault isolation in conventional linear systems-A feasibility study,” IEEE Trans. Rel., vol. R-15, pp. 11–16, May 1965.
5. J. D. Bastian, “Fault isolation of analog circuits,” Proc. Twelfth Asilomar Conf. Circuits, Syst., and Comp., Western Periodicals, North Hollywood, Nov. 1978.
6. W. Mayeda and G. Peponides, “Determination of component values in passive networks under limited measurements,” in Proc. Twelfth Asilomar Conf. Circuits, Syst., and Comp., Western Periodicals, North Nov. 1978.
7. T. N. Trick, Introduction to Circuit Analysis. New York: Wiley, Ch. 15, 1977.
8. S. W. Director and R. A. Rohrer, “Automated network design— The frequency domain case,” IEEE Trans. Circuit Theory, vol. CT-16, pp. 330–337, Aug. 1969.
9. R. N. Gadenz, M. G. Rezai-Fakhr, and G. C. Temes, “A method for the computation of large tolerance effects,” IEEE Trans. Circuit Theory, vol. CT-20, pp. 704–708, Nov. 1973.
10. T. N. Trick and A. A. Sakla, “A new algorithm for the fault analysis and tuning of analog circuits,” in Proc. IEEE Int. Synp Circuits and Syst., pp. 156-160, May 1978.
11. T. N. Trick and C. J. Alajajian, “Fault analysis of analog circuits,” in Proc. 20th Midwest Symp. Circuits and Syst., Western Periodicals, North Hollywood, Part 1, pp. 211–215, Aug. 1977.
12. R. Saeks S. P. Singh, and R. Liu, “Fault isolation via component simulation,” IEEE Trans. Circuit Theory, vol. CT-19, pp. 634–640, Nov. 1972.