Short-Channel MOSFET's in the Punchthrough Current Mode

IEEE Transactions on Electron Devices

Volumn 26, Issue 4, 1979, Pages 446-453

  Dutton, Robert W ^c  

^a FAIRCHILD SEMICONDUCTOR   (United States)

^b Hitazhi Ltd ^*  (Japan)

^c STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS - LARGE SCALE INTEGRATION;

SEMICONDUCTOR DEVICES, MIS;

EID: 0018456156     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1979.19447     Document Type: Article

References (14)

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2. J. D. Meindl et al, “Computer aided engineering of semiconductor integrated circuits Stanford Univ. IC Lab. Rep., SEL 78-011,pp.177–197,Feb. 1978.
3. D. A. Antoniadis, S. E. Hansen, R. W. Dutton, and A. G. Gonzalez, “SUPREM 1-A program for IC process modeling and simulation Stanford Electron. Lab., Tech. Rep. 50-191, May 1977.
4. R. R. Troutman, “Subthreshold design consideration for insulated gate field-effect transistors IEEE J. Solid-State Circuits, vol. SC-9, p. 57, Apr. 1974.
5. G. W. Taylor, “Subthreshold conduction in MOSFETs,” IEEE Trans. Electron Devices, vol. ED-25, pp. 337–350, Mar. 1978.
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7. R. M. Swanson, “Complementary MOS transistors in micropower circuits Stanford Electron. Lab., Tech. Rep. 4863–1, Dec. 1974.
8. K. Shimohigashi, J. J. Barnes, and R. W. Dutton, “Characteristics of short channel MOSFETs in the punch-through current mode in Int. Electron Devices Meet. Tech. Digest, pp. 68–69, Dec. 1978.
9. R. A. Stuart and W. Eccleston, “Punchthrough currents in short-channel MOST devices Electron. Lett., vol. 9, pp. 586–588, Dec. 1973.
10. I. M. Bateman, G. A. Armstrong, and J. A. Macgowan, “Drain voltage limitations of MOS transistors Solid-State Electron., vol. 17, pp. 539–550, June 1976.
11. S. R. Hofstein and F. P. Heiman, “The silicon insulated gate field-effect transistor Proc. IEEE, pp. 1190-1202, Sept. 1963.
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13. P. Richman, “Modulation of space-charge-limited current flow in insulated-gate field effect tetrodes IEEE Trans. Electron Devices, vol. ED-16, pp. 759–766, Sept. 1969.
14. P. P. Wang, “Double boron implanted short-channel MOSFET IEEE Trans. Electron Devices, vol. ED-24, pp. 196–206, Mar. 1977.