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1
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0016620207
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All-MOS charge redistribution analog-to-digital conversion techniques-Part I
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Dec.
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J. L. McCreary and P. R. Gray “All-MOS charge redistribution analog-to-digital conversion techniques-Part I,” IEEE J. Solid-State Circuits, vol. SC-10, pp. 371–379, Dec. 1975.
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(1975)
IEEE J. Solid-State Circuits
, vol.SC-10
, pp. 371-379
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McCreary, J.L.1
Gray, P.R.2
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2
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0016620207
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All-MOS charge redistribution analog-to-digital conversion techniques—Part II
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Dec.
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R. E. Suarez, P. R. Gray, and D. A. Hodges “All-MOS charge redistribution analog-to-digital conversion techniques—Part II,” IEEE J. Solid-State Circuits, vol. SC-10, pp. 379–385, Dec. 1975.
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(1975)
IEEE J. Solid-State Circuits
, vol.SC-10
, pp. 379-385
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Suarez, R.E.1
Gray, P.R.2
Hodges, D.A.3
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3
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84984302358
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An algorithmic analog-to-digital converter
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Philadelphia, PA, in Dig. Tech. Papers, Feb.
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R. H. McCharles, V. A. Saletore, W. C. Black, Jr., and D. A. Hodges, “An algorithmic analog-to-digital converter,” in Int. Solid-State Circuits Conf., Philadelphia, PA, in Dig. Tech. Papers, pp. 96–97, Feb. 1977.
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(1977)
Int. Solid-State Circuits Conf.
, pp. 96-97
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McCharles, R.H.1
Saletore, V.A.2
Black, W.C.3
Hodges, D.A.4
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4
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0017278239
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A segmented µ-225 law PCM voice encoder utilizing NMOS technology
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Dec.
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Y. P. Tsividis, P. R. Gray, D. A. Hodges, and J. Chacko, Jr. “A segmented µ-225 law PCM voice encoder utilizing NMOS technology,” IEEE J. Solid-State Circuits, vol. SC-11, pp. 740–753, Dec. 1976.
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(1976)
IEEE J. Solid-State Circuits
, vol.SC-11
, pp. 740-753
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Tsividis, Y.P.1
Gray, P.R.2
Hodges, D.A.3
Chacko, J.4
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5
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84943730239
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Computer simulation of PCM systems
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ch. 3 of Nonuniform pulse code modulation encoding using integrated circuit techniques, Ph.D. dissertation, Univ. of California, Berkeley, May
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Y. P. Tsividis, “Computer simulation of PCM systems,” ch. 3 of “Nonuniform pulse code modulation encoding using integrated circuit techniques,” Ph.D. dissertation, Univ. of California, Berkeley, May 1976.
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(1976)
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Tsividis, Y.P.1
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6
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0017269870
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An integrated NMOS operational amplifier with internal compensation
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Dec.
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Y. P. Tsividis and P. R. Gray “An integrated NMOS operational amplifier with internal compensation,” IEEE J. Solid-State Circuits, vol. SC-11, pp. 748–753, Dec. 1976.
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(1976)
IEEE J. Solid-State Circuits
, vol.SC-11
, pp. 748-753
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Tsividis, Y.P.1
Gray, P.R.2
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7
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84943733719
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National CSS, Norwalk, Ct.
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National CSS, ISPICE User's Manual, Norwalk, Ct.
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ISPICE User's Manual
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8
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0017790429
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A CMOS digitally-controlled analog attenuator for voice-band signals
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Phoenix, AZ, Apr. 25–27
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G. L. Baldwin and J. L. McCreary, “A CMOS digitally-controlled analog attenuator for voice-band signals,” in 1977 IEEE Int. Symp. on Circuits and Systems Proc., Phoenix, AZ, Apr. 25–27, 1975, pp. 519–524.
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1977 IEEE Int. Symp. on Circuits and Systems Proc.
, pp. 519-524
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Baldwin, G.L.1
McCreary, J.L.2
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9
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0017790430
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MOS sampled data recursive filters using state variable techniques
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Phoenix, AZ, Apr. 25–27
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B. J. Hosticka, R. W. Brodersen, and P. R. Gray, “MOS sampled data recursive filters using state variable techniques,” in 1977 IEEE Int. Symp. on Circuits and Systems Proc., Phoenix, AZ, Apr. 25–27, 1975, pp. 525–529.
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(1975)
1977 IEEE Int. Symp. on Circuits and Systems Proc.
, pp. 525-529
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Hosticka, B.J.1
Brodersen, R.W.2
Gray, P.R.3
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10
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85068317993
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Fully-integrated high-order NMOS sampled-data ladder filters
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San Francisco, CA, 268, Feb.
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D. J. Allstot, R. W. Brodersen, and P. R. Gray, “Fully-integrated high-order NMOS sampled-data ladder filters,” in Int. Solid-State Circuits Conf, San Francisco, CA, pp. 82–83, 268, Feb. 1978.
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(1978)
Int. Solid-State Circuits Conf
, pp. 82-83
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Allstot, D.J.1
Brodersen, R.W.2
Gray, P.R.3
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11
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0015418804
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D2 channel bank
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Oct.
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H. H. Henning et al. “D2 channel bank,” Bell Syst. Tech. J., vol. 51, no. 8, pp. 1641–1765, Oct. 1972.
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Bell Syst. Tech. J.
, vol.51
, Issue.8
, pp. 1641-1765
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Henning, H.H.1
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12
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84939397055
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Issue 2, Engineering Dept., American Telephone and Telegraph Company, Oct. 14
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The D3 Channel Bank Compatibility Specification, Issue 2, Engineering Dept., American Telephone and Telegraph Company, Oct. 14, 1974.
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(1974)
The D3 Channel Bank Compatibility Specification
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