A Simple Two-Dimensional Model for IGFET Operation in the Saturation Region

IEEE Transactions on Electron Devices

Volumn 24, Issue 3, 1977, Pages 254-262

  El Mansy, Y A ^a   Boothroyd, A R ^b  

^a NORTEL NETWORKS   (Canada)

^b CARLETON UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

TRANSISTORS;

EID: 0017466066     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/T-ED.1977.18716     Document Type: Article

References (17)

1. H. W. Loeb, R. Andrew, and W. Love “Application of 2-dimensional solutions of the Shockley-Poisson equation to inversion layer MOST devices,” Electron. Lett., vol. 4, pp. 352–354, Aug. 1968.
2. J. E. Schroeder and R. S. Muller “igfet analysis through numerical solution of Poisson's equation,” IEEE Trans. Electron Devices, vol. ED-15, pp. 954–961, Dec. 1968.
3. M. B. Barron, “Computer aided analysis of IGFETS,” Stanford Electronics Lab. Tech. Report No. 5501-1, Stanford University, CA, Nov. 1969.
4. D. Vandorpe and N. H. Xuong “Mathematical 2-dimensional model of semiconductor devices,” Electron. Lett., vol. 7, pp. 47–50, Jan. 1971.
5. G. A. Armstrong and J. A. Magowan “The distribution of mobile carriers in the pinch-off region of an insulated-gate field-effect transistor and its influence on device breakdown,” Solid-State Electronics, vol. 14, pp. 723–733, 1971.
6. H. K. J. Ihantola, “Design theory of a surface field-effect transistor,” Stanford Electronics Laboratories Tech. Report No. 1661-1, Stanford University, CA, Sept. 1961.
7. G. Reddi and C. T. Sah “Source to drain resistance beyond pinch-off in metal-oxide-semiconductor transistors,” IEEE Trans. Electron Devices, vol. ed-12, pp. 139–141, Mar. 1965.
8. A. Popa “An injection level dependent theory of the MOS transistor in saturation,” IEEE Trans. Electron Devices, vol. ED-19, pp. 774–781, June 1972.
9. P. Rossel, H. Martinot, and G. Vassilieff “Accurate two sections model for MOS transistor in saturation,” Solid-State Electronics, vol. 19, pp. 51–56, Jan. 1976.
10. D. Frohman-Bentchkowsky and A. S. Grove “Conductance of MOS transistors in saturation,” IEEE Trans. Electron Devices, vol. ED-16, pp. 108–113, Jan. 1969.
11. T. L. Chiu and C. T. Sah “Correlation experiments with a two-section-model theory of the saturation drain conductance of MOS transistors,” Solid-State Electronics, vol. 11, pp. 1149–1163, Dec. 1968.
12. Y. A. El-Mansy and A. R. Boothroyd, “A new approach to the theory and modelling of insulated-gate field-effect transistors,” this issue, pp. 241–253.
13. Y. A. El-Mansy, “Modelling of insulated-gate field-effect translators,” Ph.D. dissertation, Carleton University, Ottawa, Nov. 1974.
14. S. R. Hofstein and G. Warfield “Carrier mobility and current saturation in the MOS transistor,” IEEE Trans. Electron Devices, vol. ED-12, pp. 129–138, Mar. 1965.
15. B. Hoeneissen and C. A. Mead “Current voltage characteristics of small size MOS transistor,” IEEE Trans. Electron Devices, vol. ED-19, pp. 382–383, Mar. 1972.
16. Y. A. El-Mansy and D. M. Caughey, “Modelling weak avalanche multiplication currents in IGFETS and SOS transistors for CAD,” in International Electron Devices Meeting Technical Digest (Washington, DC), Dec. 1975.
17. M. Caughey et al. “Circuit simulation by computer,” Solid State Technology, vol. 16, pp. 33–38, Feb. 1973.