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Volumn 22, Issue 12, 1975, Pages 901-910

MOTIS—An MOS Timing Simulator

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORKS - COMPUTER AIDED ANALYSIS; INTEGRATED CIRCUITS - LARGE SCALE INTEGRATION; SEMICONDUCTOR DEVICES, MIS - MODELING;

EID: 0016650246     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCS.1975.1084003     Document Type: Article
Times cited : (150)

References (14)
  • 1
    • 33747020799 scopus 로고
    • The diagnosis of asynchronous sequential switching systems
    • Aug.
    • S. Seshu and D. N. Freeman “The diagnosis of asynchronous sequential switching systems,” IRE Trans. Electron. Comput., vol. EC-11, pp. 459–465, Aug. 1962.
    • (1962) IRE Trans. Electron. Comput. , vol.EC-11 , pp. 459-465
    • Seshu, S.1    Freeman, D.N.2
  • 2
    • 0014643344 scopus 로고
    • A three value computer design verification system
    • J. S. Jephson, R. P. McQuarrie, and R. E. Vogelsberg “A three value computer design verification system,” IBM Syst. J., vol. 8, no. 3, pp. 178–188, 1969.
    • (1969) IBM Syst. J. , vol.8 , Issue.3 , pp. 178-188
    • Jephson, J.S.1    McQuarrie, R.P.2    Vogelsberg, R.E.3
  • 3
    • 84942006854 scopus 로고
    • Fairchild Semiconductor, Mountain View, Calif., Oct.
    • FAIRSIM II User's Manual, Fairchild Semiconductor, Mountain View, Calif., Oct. 1969.
    • (1969) FAIRSIM II User's Manual
  • 5
    • 85058889921 scopus 로고
    • TEGAS 2—Anatomy of a general purpose test generation and simulation system for digital logic
    • (June)
    • S. A. Szygenda, “TEGAS 2—Anatomy of a general purpose test generation and simulation system for digital logic,” in Proc. 9th ACM-IEEE Design Automation Workshop (June 1972), pp. 116–127.
    • (1972) Proc. 9th ACM-IEEE Design Automation Workshop , pp. 116-127
    • Szygenda, S.A.1
  • 6
    • 85050924325 scopus 로고
    • The concurrent simulation of nearly identical digital networks
    • (Portland. Oreg., June)
    • E. G. Ulrich and T. Baker, “The concurrent simulation of nearly identical digital networks,” in Proc. 10th ACM-IEEE Design Automation Workshop (Portland. Oreg., June 1973). pp. 145–150.
    • (1973) Proc. 10th ACM-IEEE Design Automation Workshop , pp. 145-150
    • Ulrich, E.G.1    Baker, T.2
  • 7
    • 84942008107 scopus 로고
    • GAZELLE—An interactive graphic logic design system
    • presented at the ACM Nat. Conf., Atlanta, Ga., Aug., also ACM, SIGDA Newsletter, vol. 4, June 1974
    • W. H. Sass, “GAZELLE—An interactive graphic logic design system,” presented at the ACM Nat. Conf., Atlanta, Ga., Aug. 1973; also ACM, SIGDA Newsletter, vol. 4, June 1974.
    • (1973)
    • Sass, W.H.1
  • 8
    • 84942008325 scopus 로고
    • A minicomputer-based logic fault simulator
    • (Denver, Colo., June); also ACM, SIGDA Newsletter, vol. 4, Sept. 1974
    • M. Flomenhoft and B. M. Csencsits, “A minicomputer-based logic fault simulator,” in Proc. 11th ACM-IEEE Design Automation Workshop (Denver, Colo., June 1974); also ACM, SIGDA Newsletter, vol. 4, Sept. 1974.
    • (1974) Proc. 11th ACM-IEEE Design Automation Workshop
    • Flomenhoft, M.1    Csencsits, B.M.2
  • 11
    • 84942007069 scopus 로고    scopus 로고
    • Operational features of an MOS timing simulator
    • to be publish
    • P. Kozak, H. K. Gummel, and B. R. Chawla, “Operational features of an MOS timing simulator,” to be published.
    • Kozak, P.1    Gummel, H.K.2    Chawla, B.R.3
  • 12
    • 84942008058 scopus 로고
    • Development of a compact process-oriented dc model for short channel IGFETs
    • presented at the 8th Asilomar Conf. Circuits, Systems and Computers, Pacific Grove, Calif., Dec.
    • H. C. Poon, “Development of a compact process-oriented dc model for short channel IGFETs,” presented at the 8th Asilomar Conf. Circuits, Systems and Computers, Pacific Grove, Calif., Dec. 1974.
    • (1974)
    • Poon, H.C.1
  • 13
    • 85051627160 scopus 로고
    • Computer-aided prediction of delays in LSI logic systems
    • (Portland, Oreg., June)
    • D. J. Pilling and H. B. Sun, “Computer-aided prediction of delays in LSI logic systems,” in Proc. 10th ACM-IEEE Design Automation Workshop (Portland, Oreg., June 1973), pp. 182–186.
    • (1973) Proc. 10th ACM-IEEE Design Automation Workshop , pp. 182-186
    • Pilling, D.J.1    Sun, H.B.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.