All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques—Part I

IEEE Journal of Solid-State Circuits

Volumn 10, Issue 6, 1975, Pages 371-379

  McCreary, James L ^a   Gray, Paul R ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CIRCUITS, DIGITAL;

DATA CONVERSION, ANALOG TO DIGITAL;

EID: 0016620207     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1975.1050629     Document Type: Article

References (8)

1. J. A. Schoeff, “A monolithic analog subsystem for high-accuracy A/D conversion,” in ISSCC Dig. Tech. Papers, Feb. 1973, pp. 18–19.
2. H. Schmidt, Analog-Digital Conversion. New York: Van Nostrand-Reinholt, 1970.
3. R. E. Suarez, P. R. Gray, and D. A. Hodges, “All-MOS charge redistribution analog-to-digital conversion techniques-part II,” this issue, pp. 379–385.
4. —, “An all-MOS charge-redistribution A/D conversion technique,” in ISSCC Dig. Tech. Papers, Feb. 1974, 194–195.
5. R. Poujours et al., “Low level MOS transistor amplifier using storage techniques,” in ISSCC Dig. Tech. Papers, Feb. 1973, pp. 152–153.
6. J. McCreary and P. R. Gray, “A high-speed, all-MOS successive approximation weighted capacitor A/D conversion technique,” in ISSCC Dig. Tech. Papers, Feb. 1975, pp. 38–39.
7. C. W. Barbour, “Simplified PCM analog to digital converter using capacity charge transfer,” in Proc. 1971 Telemetering Conf., pp. 4.1-4.11.
8. J. McCreary, “Successive approximation analog-to-digital conversion in MOS integrated circuits,” Ph.D. dissertation, Univ. California, Berkeley, 1975.