An Optimized Output Stage for MOS Integrated Circuits

IEEE Journal of Solid-State Circuits

Volumn 10, Issue 2, 1975, Pages 106-109

  Lin, Hung Chang ^a   Linholm, Loren W ^b  

^a UNIVERSITY OF MARYLAND   (United States)

^b Department of Defense ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MOS IC;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0016498379     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1975.1050569     Document Type: Article

References (0)