Procedures for Eliminating Static and Dynamic Hazards in Test Generation

IEEE Transactions on Computers

Volumn C-23, Issue 10, 1974, Pages 1069-1078

  Breuer, Melvin A ^a,b   Harrison, R Loyd ^b  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

^b RAYTHEON COMPANY   (United States)

Author keywords

Dynamic hazards; fault detection; simulation; static hazards; test generation for sequential circuits

Indexed keywords

LOGIC CIRCUITS;

EID: 0016115877     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/T-C.1974.223807     Document Type: Article

References (9)

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9. S. H. Unger, Asynchronous Sequential Switching Circuits. New York: Wiley-Interscience, 1969.