메뉴 건너뛰기




Volumn C-21, Issue 12, 1972, Pages 1440-1443

The Simplification of Sequential Machines with Input Restrictions

Author keywords

Composite machines; flow table simplification; input restricted flow table; sequential machines

Indexed keywords

AUTOMATA THEORY;

EID: 0015490732     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/T-C.1972.223521     Document Type: Article
Times cited : (31)

References (8)
  • 1
    • 50449135399 scopus 로고
    • The synthesis of sequential switching circuits
    • Mar./Apr.
    • D. A. Huffman, “The synthesis of sequential switching circuits,” J. Franklin Inst., vol. 257, pp. 161–190, 275–303, Mar./Apr. 1954.
    • (1954) J. Franklin Inst. , vol.257 , pp. 161-190
    • Huffman, D.A.1
  • 2
    • 84862182071 scopus 로고
    • A technique for the reduction of a given machine to a minimal state machine
    • Sept.
    • S. Ginsburg, “A technique for the reduction of a given machine to a minimal state machine,” IRE Trans. Electron. Comput., vol. EC-8, pp. 346–355, Sept. 1959.
    • (1959) IRE Trans. Electron. Comput. , vol.EC-8 , pp. 346-355
    • Ginsburg, S.1
  • 3
    • 0004802505 scopus 로고
    • Minimizing the number of states in incompletely specified sequential switching functions
    • Sept.
    • M. C. Paull and S. H. Unger, “Minimizing the number of states in incompletely specified sequential switching functions,” IRE Trans. Electron. Comput., vol. EC-8, pp. 356–367, Sept. 1959.
    • (1959) IRE Trans. Electron. Comput. , vol.EC-8 , pp. 356-367
    • Paull, M.C.1    Unger, S.H.2
  • 4
    • 0001442299 scopus 로고
    • A method for minimizing the number of internal states in incompletely specified sequential networks
    • June
    • A. Grasselli and F. Luccio, “A method for minimizing the number of internal states in incompletely specified sequential networks,” IEEE Trans. Electron. Comput., vol. EC-14, pp. 350–359, June 1965.
    • (1965) IEEE Trans. Electron. Comput. , vol.EC-14 , pp. 350-359
    • Grasselli, A.1    Luccio, F.2
  • 5
    • 84913138522 scopus 로고
    • Minimum-state sequential circuits for a restricted class of incompletely specified flow tables
    • Nov.
    • E. J. McCluskey, “Minimum-state sequential circuits for a restricted class of incompletely specified flow tables,” Bell Syst. Tech. J., vol. 40, pp. 1759–1768, Nov. 1962.
    • (1962) Bell Syst. Tech. J. , vol.40 , pp. 1759-1768
    • McCluskey, E.J.1
  • 6
    • 84910248025 scopus 로고
    • Flow table simplification-Some useful aids
    • June
    • S. H. Unger, “Flow table simplification-Some useful aids,” IEEE Trans. Electron. Comput., vol. EC-14, pp. 472–475, June 1965.
    • (1965) IEEE Trans. Electron. Comput , vol.EC-14 , pp. 472-475
    • Unger, S.H.1
  • 7
    • 0004114514 scopus 로고    scopus 로고
    • Asynchronous Sequential Switching Circuits
    • New York: Wiley
    • S. H. Unger, Asynchronous Sequential Switching Circuits. New York: Wiley, 1969.
    • Unger, S.H.1
  • 8
    • 0003806381 scopus 로고    scopus 로고
    • Finite State Models for Logical Machines
    • New York: Wiley
    • F. C. Hennie, Finite State Models for Logical Machines. New York: Wiley, 1968.
    • Hennie, F.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.