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Volumn 58, Issue 8, 1970, Pages 1290-1291

A New Look at Yield of Integrated Circuits

Author keywords

[No Author keywords available]

Indexed keywords

IEEPA; INTEGRATED CITCUITS; PRO;

EID: 0014923116     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/PROC.1970.7911     Document Type: Article
Times cited : (81)

References (4)
  • 1
    • 84938162176 scopus 로고
    • Cost-size optima of monolithic integrated circuits
    • December.
    • B. T. Murphy, “Cost-size optima of monolithic integrated circuits,” Proc. IEEE, vol. 52, pp. 1537–1545, December 1964.
    • (1964) Proc. IEEE , vol.52 , pp. 1537-1545
    • Murphy, B.T.1
  • 2
    • 0343991283 scopus 로고
    • Computation of integrated-circuit yields from the distribution of slice yields for the individual devices
    • June.
    • W. G. Ansley, “Computation of integrated-circuit yields from the distribution of slice yields for the individual devices,” IEEE Trans. Electron Devices (Correspondence), vol. ED-15, pp. 405–406, June 1968.
    • (1968) IEEE Trans. Electron Devices (Correspondence) , vol.ED-15 , pp. 405-406
    • Ansley, W.G.1
  • 3
    • 4243564465 scopus 로고
    • Yield and cost analysis of bipolar LSI
    • presented at the IEEE Internatl. Electron Devices Meeting, Washington, D. C., October.
    • R. B. Seeds, “Yield and cost analysis of bipolar LSI,” presented at the IEEE Internatl. Electron Devices Meeting, Washington, D. C., October 1967.
    • (1967)
    • Seeds, R.B.1
  • 4
    • 0014732837 scopus 로고
    • What level of LSI is best for you
    • February.
    • A. E. Moore, “What level of LSI is best for you?” Electronics, vol. 43, pp. 126–130, February 1970.
    • (1970) Electronics , vol.43 , pp. 126-130
    • Moore, A.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.