Comparison of duplex and triplex memory reliability

IEEE Transactions on Computers

Volumn 45, Issue 4, 1996, Pages 503-507

  Vaidya, Nitin H ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

Coding; Modular redundancy; Reliability; Replication

Indexed keywords

EID: 0013222375     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.494111     Document Type: Review

References (7)

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2. W.E. Boyce and R.C. DiPrima, Calculus. John Wiley & Sons, 1988.
3. D.W. Johnson, Design and Analysis of Fault Tolerant Digital Systems. Addison-Wesley, 1989.
4. T.R.N. Rao and E. Fujiwara, Error-Control Coding for Computer Systems. Prentice Hall, 1989.
5. D.P. Siewiorek, "Reliability Modeling of Compensating Module Failures in Majority Voted Redundancy," IEEE Trans. Computers, vol. 24, pp. 525-533, May 1975.
6. N.H. Vaidya, "Duplex and Triplex Memory: Which is more Reliable?" Tech. Report 94-025, Computer Science Dept., Texas A&M Univ., College Station, Feb. 1994.
7. N.H. Vaidya and D.K. Pradhan, "Fault-Tolerant Design Strategies for High Reliability and Safety," IEEE Trans. Computers, vol. 42, pp. 1,195-1,206, Oct. 1993.