Removing barriers to low-k dielectric adoption

Semiconductor International

Volumn 25, Issue 5, 2002, Pages 55-62

  Peters, Laura ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; COPPER; ETCHING; INDUSTRIAL MANAGEMENT; INTEGRATION; LOW TEMPERATURE PRODUCTION; POROUS MATERIALS; RELIABILITY; RESEARCH AND DEVELOPMENT MANAGEMENT; SEMICONDUCTOR MATERIALS; SILICA; THERMAL EXPANSION; THERMODYNAMICS;

CARBON-DOPED OXIDES (CDO); FLUORINATED SILICATE GLASS (FSG); HONEYWELL ELECTRONIC MATERIALS (CO); LOW-K DIELECTRICS; ORGANOSILICATE GLASSES (OSG);

DIELECTRIC MATERIALS;

EID: 0013164634     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Review

References (2)

1. 2 Film with k=3.9," IEEE IITC Proceedings, 2001, p. 244.
2. J. Golden, C. Hawker, P. Ho, "Designing Porous Low-k Dielectrics," Semiconductor International, May 2001.