Pipelined DSP design with a true single-phase energy-recovering logic style

Proceedings - IEEE Alessandro Volta Memorial Workshop on Low-Power Design, VOLTA 1999

Volumn , Issue , 1999, Pages 135-143

  Kim, Suhwan ^a   Papaefthymiou, Marios C ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC POWER SUPPLIES TO APPARATUS; ENERGY UTILIZATION; HADAMARD TRANSFORMS; INTEGRATED CIRCUIT DESIGN; LOW POWER ELECTRONICS; RECOVERY;

CMOS TECHNOLOGY; ENERGY EFFICIENT; ENERGY RECOVERING; ENERGY RECOVERING CIRCUITS; LAYOUT SIMULATIONS; LOW ENERGY CONSUMPTION; OPERATING FREQUENCY; REFERENCE VOLTAGES;

ENERGY EFFICIENCY;

EID: 0011934401     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPD.1999.750414     Document Type: Conference Paper

References (10)

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