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Volumn 43, Issue 1, 1997, Pages 21-35

Simulated Annealing Based Parallel State Assignment of Finite State Machines

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EID: 0010365642     PISSN: 07437315     EISSN: None     Source Type: Journal    
DOI: 10.1006/jpdc.1997.1325     Document Type: Article
Times cited : (6)

References (22)
  • 2
    • 0023978575 scopus 로고
    • Parallel cell placement algorithms with quality equivalent to simulated annealing
    • Rose J. S., Snelgrove W. M., Vranesic Z. G. Parallel cell placement algorithms with quality equivalent to simulated annealing. IEEE Trans. Comput. Aided Design. 7:Mar. 1988;387-396.
    • (1988) IEEE Trans. Comput. Aided Design , vol.7 , pp. 387-396
    • Rose, J.S.1    Snelgrove, W.M.2    Vranesic, Z.G.3
  • 5
    • 0025399222 scopus 로고
    • A parallel branch and bound algorithm for test generation
    • Patil S., Banerjee P. A parallel branch and bound algorithm for test generation. IEEE Trans. Comput. Aided Design. 9:Mar. 1990;313-322.
    • (1990) IEEE Trans. Comput. Aided Design , vol.9 , pp. 313-322
    • Patil, S.1    Banerjee, P.2
  • 6
    • 0027005302 scopus 로고
    • Portable parallel test generation for sequential circuits, Digest of Papers
    • 223, Santa Clara, CA
    • B. Ramkumar, P. Banerjee, 1992, Portable parallel test generation for sequential circuits, Digest of Papers, International Conference on Computer-Aided Design, 220, 223, Santa Clara, CA.
    • (1992) International Conference on Computer-Aided Design , pp. 220
    • Ramkumar, B.1    Banerjee, P.2
  • 8
    • 0004529209 scopus 로고
    • Synthesis of multiple level logic from symbolic high-level description languages
    • 196
    • B. Lin, A. Newton, 1989, Synthesis of multiple level logic from symbolic high-level description languages, Proceedings of the International Conference on VLSI, 187, 196.
    • (1989) Proceedings of the International Conference on VLSI , pp. 187
    • Lin, B.1    Newton, A.2
  • 9
    • 0028733849 scopus 로고
    • A library-based approach to portable, parallel, object-oriented programming: Interface, implementation, and application
    • 78, Washington, DC
    • S. Parkes, J. A. Chandy, P. Banerjee, 1994, A library-based approach to portable, parallel, object-oriented programming: Interface, implementation, and application, Supercomputing '94, 69, 78, Washington, DC.
    • (1994) Supercomputing '94 , pp. 69
    • Parkes, S.1    J. A. Chandy2    Banerjee, P.3
  • 15
    • 0000759757 scopus 로고
    • Parallel simulated annealing techniques
    • Greening D. R. Parallel simulated annealing techniques. Physica D. 42:1990;293-306.
    • (1990) Physica D , vol.42 , pp. 293-306
    • Greening, D.R.1
  • 18
    • 0025206726 scopus 로고
    • Parallel simulated annealing algorithms for standard cell placement on hypercube multiprocessors
    • Banerjee P., Jones M. H., Sargent J. S. Parallel simulated annealing algorithms for standard cell placement on hypercube multiprocessors. IEEE Trans. Parallel Distrib. Systems. 1:Jan. 1990;91-106.
    • (1990) IEEE Trans. Parallel Distrib. Systems , vol.1 , pp. 91-106
    • Banerjee, P.1    Jones, M.H.2    Sargent, J.S.3
  • 20
    • 0023349607 scopus 로고
    • Parallel algorithms for chip placement by simulated annealing
    • Darema F., Kirkpatrick S., Norton V. A. Parallel algorithms for chip placement by simulated annealing. IBM J. Res. Dev. 31:May 1987;391-402.
    • (1987) IBM J. Res. Dev. , vol.31 , pp. 391-402
    • Darema, F.1    Kirkpatrick, S.2    Norton, V.A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.