Analytical Engines are Unnecessary in Top-down Partitioning-based Placement

VLSI Design

Volumn 10, Issue 1, 1999, Pages 99-116

  Alpert, C J ^a,c   Caldwell, A E ^b,c   Chan, T F ^c,f   Huang, D J H ^{b,c,d,g,h,i,j}   Kahng, A B ^b,k   Markov, I L ^b   Moroz, M S ^e  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

^b University of California   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

^d Silicon Perspective Corp   (United States)

^e UNIVERSITY OF CALIFORNIA   (United States)

^f YALE UNIVERSITY   (United States)

^g NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^h STONY BROOK UNIVERSITY   (United States)

ⁱ High Level Design Systems   (United States)

^j SYNOPSYS INC   (United States)

^k HARVARD COLLEGE   (United States)

more..

Author keywords

Hierarchical top down placement; Multi level min cut partitioning; Quadratic placement

Indexed keywords

EID: 0009788432     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/1999/93607     Document Type: Article

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