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Volumn 2000-January, Issue , 2000, Pages 361-366

Design of encapsulating materials for advanced area bump packages

Author keywords

Costs; Electronic packaging thermal management; Electronics packaging; Flip chip; Frequency; Mass production; Plastics; Size control; Stress; Thermal pollution

Indexed keywords

COST REDUCTION; COSTS; DESIGN; ELECTRONICS PACKAGING; FLIP CHIP DEVICES; INTEGRATED CIRCUIT DESIGN; PARTICLE SIZE; PLASTICS; POLLUTION; POLLUTION CONTROL; PROCESS CONTROL; STRESSES; SUBSTRATES; THERMAL EXPANSION; THERMAL POLLUTION; THERMAL SHOCK;

EID: 0009555828     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2000.906401     Document Type: Conference Paper
Times cited : (2)

References (3)
  • 2
  • 3
    • 4444326848 scopus 로고    scopus 로고
    • Simultaneous Chip-Join and Under-fill Assembly technology for Flip Chip Packaging
    • rd quarter
    • rd quarter 2000,http://developer.intel.com/technology/itj/index.htm.
    • (2000) Intel Technology Journal
    • Dory, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.