A learning parallel analog-to-digital vector quantizer

Journal of Circuits, Systems and Computers

Volumn 8, Issue 5-6, 1998, Pages 605-614

  Lubkin, Jeremy ^a   Cauwenberghs, Gert ^a  

^a Johns Hopkins University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0008368906     PISSN: 02181266     EISSN: None     Source Type: Journal    
DOI: 10.1142/s0218126698000389     Document Type: Article

References (14)

1. A. Gersho and R. M. Gray, Vector Quantization and Signal Compression, MA: Kluwer, Norwell, 1992.
2. Gail A. Carpenter, Stephen Grossberg, and David B. Rosen, "Fuzzy ART: fast stable learning and categorization of analog patterns by an adaptive resonance system", Neural Networks 4 (1991) 759-771.
3. B. Hochet, V. Peiris, S. Abdot, and M. J. Declercq, "Implementation of a learning Kohonen neuron based on a new multilevel storage technique", IEEE J. Solid-State Circuits 26 (1991) 262-267.
4. W. C. Fang, B. J. Sheu, O. T. C. Chen, and J. Choi, "A VLSI neural processor for image data-compression using self-organization networks", IEEE Trans. Neural Networks 3 (1992) 506-518.
5. Y. He and U. Cilingiroglu, "A charge-based on-chip adaptation Kohonen neural network", IEEE Trans. Neural Networks 4 (1993) 462-469.
6. G. T. Tuttle, S. Fallahi, and A. A. Abidi, "An 8b CMOS vector A/D converter", ISSCC Tech. Digest 36 (1993) 38-39.
7. G. Cauwenberghs and V. Pedroni, "A charge-based CMOS parallel analog vector quantizer", Adv. Neural Information Processing Syst. 7 (1995) 779-786.
8. M. Konda, T. Shibata, and T. Ohmi, "Neuron-MOS correlator based on Manhattan distance computation for event recognition hardware," Dig. Int. Symp. Circuits Syst., Atlanta, GA, 1996.
9. T. Serrano-Gotarredona, B. Linares-Barranco, and J. L. Huertas, "A real time clustering CMOS neural engine", Adv. Neural Information Processing Syst. 7 (1995).
10. J. Lazzaro, S. Ryckebusch, M. A. Mahowald, and C. A. Mead, "Winner-take-all networks of O(n) complexity", Adv. Neural Information Processing Syst. 1 (1989) 703-711.
11. A. G. Andreou, K. A. Boahen, P. O. Pouliquen, A. Pavasovic, R. E. Jenkins, and K. Strohbehn, "Current-mode subthreshold MOS circuits for analog VLSI neural systems", IEEE Trans. Neural Networks 2 (1991) 205-213.
12. G. Cauwenberghs and A. Yariv, "Fault-tolerant dynamic multi-level storage in analog VLSI", IEEE Trans. Circuits Syst. II: Analog and Digital Signal Processing 41 (1994) 827-829.
13. G. Cauwenberghs, "Analog VLSI stochastic perturbative learning architectures", Int. J. Analog Integrated Circuits Signal Processing 13 (1997) 195-209.
14. G. Cauwenberghs, "A micropower CMOS algorithmic A/D/A converter", IEEE Trans. Circuits and Syst. I: Fundamental Theory and Applications 42 (1995) 913-919.